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@@ -412,6 +412,13 @@ choice
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of the tiles using the RS1 memory map, including all new A-class
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of the tiles using the RS1 memory map, including all new A-class
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core tiles, FPGA-based SMMs and software models.
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core tiles, FPGA-based SMMs and software models.
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+ config DEBUG_VT8500_UART0
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+ bool "Use UART0 on VIA/Wondermedia SoCs"
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+ depends on ARCH_VT8500
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+ help
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+ This option selects UART0 on VIA/Wondermedia System-on-a-chip
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+ devices, including VT8500, WM8505, WM8650 and WM8850.
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+
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config DEBUG_LL_UART_NONE
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config DEBUG_LL_UART_NONE
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bool "No low-level debugging UART"
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bool "No low-level debugging UART"
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depends on !ARCH_MULTIPLATFORM
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depends on !ARCH_MULTIPLATFORM
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@@ -506,6 +513,7 @@ config DEBUG_LL_INCLUDE
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default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
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default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
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default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
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default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
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DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
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DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
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+ default "debug/vt8500.S" if DEBUG_VT8500_UART0
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default "debug/tegra.S" if DEBUG_TEGRA_UART
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default "debug/tegra.S" if DEBUG_TEGRA_UART
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default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
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default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
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default "mach/debug-macro.S"
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default "mach/debug-macro.S"
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