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@@ -1,12 +1,12 @@
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-* Rockchip RK1108 Clock and Reset Unit
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+* Rockchip RV1108 Clock and Reset Unit
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-The RK1108 clock controller generates and supplies clock to various
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+The RV1108 clock controller generates and supplies clock to various
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controllers within the SoC and also implements a reset controller for SoC
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controllers within the SoC and also implements a reset controller for SoC
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peripherals.
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peripherals.
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Required Properties:
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Required Properties:
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-- compatible: should be "rockchip,rk1108-cru"
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+- compatible: should be "rockchip,rv1108-cru"
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- reg: physical base address of the controller and length of memory mapped
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- reg: physical base address of the controller and length of memory mapped
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region.
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region.
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- #clock-cells: should be 1.
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- #clock-cells: should be 1.
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@@ -19,7 +19,7 @@ Optional Properties:
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Each clock is assigned an identifier and client nodes can use this identifier
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume. All available clocks are defined as
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to specify the clock which they consume. All available clocks are defined as
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-preprocessor macros in the dt-bindings/clock/rk1108-cru.h headers and can be
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+preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
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used in device tree sources. Similar macros exist for the reset sources in
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used in device tree sources. Similar macros exist for the reset sources in
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these files.
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these files.
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@@ -38,7 +38,7 @@ clock-output-names:
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Example: Clock controller node:
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Example: Clock controller node:
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cru: cru@20200000 {
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cru: cru@20200000 {
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- compatible = "rockchip,rk1108-cru";
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+ compatible = "rockchip,rv1108-cru";
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reg = <0x20200000 0x1000>;
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reg = <0x20200000 0x1000>;
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rockchip,grf = <&grf>;
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rockchip,grf = <&grf>;
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@@ -50,7 +50,7 @@ Example: UART controller node that consumes the clock generated by the clock
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controller:
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controller:
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uart0: serial@10230000 {
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uart0: serial@10230000 {
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- compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart";
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+ compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
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reg = <0x10230000 0x100>;
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reg = <0x10230000 0x100>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-shift = <2>;
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