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@@ -195,4 +195,19 @@
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*/
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#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
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+/*
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+ * Intel Yf-tiling layout
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+ *
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+ * This is a tiled layout using 4Kb tiles in row-major layout.
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+ * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
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+ * are arranged in four groups (two wide, two high) with column-major layout.
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+ * Each group therefore consits out of four 256 byte units, which are also laid
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+ * out as 2x2 column-major.
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+ * 256 byte units are made out of four 64 byte blocks of pixels, producing
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+ * either a square block or a 2:1 unit.
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+ * 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
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+ * in pixel depends on the pixel depth.
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+ */
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+#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
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+
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#endif /* DRM_FOURCC_H */
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