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@@ -32,12 +32,16 @@
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* @src_w: buffer width
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* @src_h: buffer height
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* @alpha: alpha blending of the plane
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+ * @disc_x: x discard position
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+ * @disc_y: y discard position
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+ * @disc_w: discard width
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+ * @disc_h: discard height
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* @bpp: bytes per pixel deduced from pixel_format
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* @offsets: offsets to apply to the GEM buffers
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* @xstride: value to add to the pixel pointer between each line
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* @pstride: value to add to the pixel pointer between each pixel
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* @nplanes: number of planes (deduced from pixel_format)
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- * @prepared: plane update has been prepared
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+ * @dscrs: DMA descriptors
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*/
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struct atmel_hlcdc_plane_state {
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struct drm_plane_state base;
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@@ -52,8 +56,6 @@ struct atmel_hlcdc_plane_state {
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u8 alpha;
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- bool disc_updated;
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-
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int disc_x;
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int disc_y;
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int disc_w;
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@@ -62,12 +64,14 @@ struct atmel_hlcdc_plane_state {
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int ahb_id;
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/* These fields are private and should not be touched */
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- int bpp[ATMEL_HLCDC_MAX_PLANES];
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- unsigned int offsets[ATMEL_HLCDC_MAX_PLANES];
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- int xstride[ATMEL_HLCDC_MAX_PLANES];
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- int pstride[ATMEL_HLCDC_MAX_PLANES];
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+ int bpp[ATMEL_HLCDC_LAYER_MAX_PLANES];
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+ unsigned int offsets[ATMEL_HLCDC_LAYER_MAX_PLANES];
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+ int xstride[ATMEL_HLCDC_LAYER_MAX_PLANES];
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+ int pstride[ATMEL_HLCDC_LAYER_MAX_PLANES];
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int nplanes;
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- bool prepared;
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+
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+ /* DMA descriptors. */
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+ struct atmel_hlcdc_dma_channel_dscr *dscrs[ATMEL_HLCDC_LAYER_MAX_PLANES];
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};
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static inline struct atmel_hlcdc_plane_state *
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@@ -259,125 +263,145 @@ static u32 heo_upscaling_ycoef[] = {
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0x00205907,
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};
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+#define ATMEL_HLCDC_XPHIDEF 4
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+#define ATMEL_HLCDC_YPHIDEF 4
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+
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+static u32 atmel_hlcdc_plane_phiscaler_get_factor(u32 srcsize,
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+ u32 dstsize,
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+ u32 phidef)
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+{
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+ u32 factor, max_memsize;
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+
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+ factor = (256 * ((8 * (srcsize - 1)) - phidef)) / (dstsize - 1);
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+ max_memsize = ((factor * (dstsize - 1)) + (256 * phidef)) / 2048;
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+
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+ if (max_memsize > srcsize - 1)
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+ factor--;
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+
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+ return factor;
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+}
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+
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static void
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-atmel_hlcdc_plane_update_pos_and_size(struct atmel_hlcdc_plane *plane,
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- struct atmel_hlcdc_plane_state *state)
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+atmel_hlcdc_plane_scaler_set_phicoeff(struct atmel_hlcdc_plane *plane,
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+ const u32 *coeff_tab, int size,
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+ unsigned int cfg_offs)
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{
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- const struct atmel_hlcdc_layer_cfg_layout *layout =
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- &plane->layer.desc->layout;
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-
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- if (layout->size)
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- layout->size,
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- 0xffffffff,
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- (state->crtc_w - 1) |
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- ((state->crtc_h - 1) << 16));
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-
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- if (layout->memsize)
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- layout->memsize,
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- 0xffffffff,
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- (state->src_w - 1) |
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- ((state->src_h - 1) << 16));
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-
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- if (layout->pos)
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- layout->pos,
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- 0xffffffff,
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- state->crtc_x |
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- (state->crtc_y << 16));
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-
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- /* TODO: rework the rescaling part */
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- if (state->crtc_w != state->src_w || state->crtc_h != state->src_h) {
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- u32 factor_reg = 0;
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-
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- if (state->crtc_w != state->src_w) {
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- int i;
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- u32 factor;
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- u32 *coeff_tab = heo_upscaling_xcoef;
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- u32 max_memsize;
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-
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- if (state->crtc_w < state->src_w)
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- coeff_tab = heo_downscaling_xcoef;
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- for (i = 0; i < ARRAY_SIZE(heo_upscaling_xcoef); i++)
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- 17 + i,
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- 0xffffffff,
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- coeff_tab[i]);
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- factor = ((8 * 256 * state->src_w) - (256 * 4)) /
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- state->crtc_w;
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- factor++;
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- max_memsize = ((factor * state->crtc_w) + (256 * 4)) /
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- 2048;
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- if (max_memsize > state->src_w)
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- factor--;
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- factor_reg |= factor | 0x80000000;
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- }
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+ int i;
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- if (state->crtc_h != state->src_h) {
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- int i;
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- u32 factor;
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- u32 *coeff_tab = heo_upscaling_ycoef;
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- u32 max_memsize;
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-
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- if (state->crtc_h < state->src_h)
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- coeff_tab = heo_downscaling_ycoef;
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- for (i = 0; i < ARRAY_SIZE(heo_upscaling_ycoef); i++)
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- 33 + i,
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- 0xffffffff,
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- coeff_tab[i]);
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- factor = ((8 * 256 * state->src_h) - (256 * 4)) /
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- state->crtc_h;
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- factor++;
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- max_memsize = ((factor * state->crtc_h) + (256 * 4)) /
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- 2048;
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- if (max_memsize > state->src_h)
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- factor--;
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- factor_reg |= (factor << 16) | 0x80000000;
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- }
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+ for (i = 0; i < size; i++)
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+ atmel_hlcdc_layer_write_cfg(&plane->layer, cfg_offs + i,
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+ coeff_tab[i]);
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+}
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+
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+void atmel_hlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane,
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+ struct atmel_hlcdc_plane_state *state)
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+{
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+ const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
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+ u32 xfactor, yfactor;
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+
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+ if (!desc->layout.scaler_config)
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+ return;
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- atmel_hlcdc_layer_update_cfg(&plane->layer, 13, 0xffffffff,
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- factor_reg);
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+ if (state->crtc_w == state->src_w && state->crtc_h == state->src_h) {
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+ atmel_hlcdc_layer_write_cfg(&plane->layer,
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+ desc->layout.scaler_config, 0);
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+ return;
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+ }
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+
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+ if (desc->layout.phicoeffs.x) {
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+ xfactor = atmel_hlcdc_plane_phiscaler_get_factor(state->src_w,
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+ state->crtc_w,
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+ ATMEL_HLCDC_XPHIDEF);
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+
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+ yfactor = atmel_hlcdc_plane_phiscaler_get_factor(state->src_h,
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+ state->crtc_h,
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+ ATMEL_HLCDC_YPHIDEF);
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+
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+ atmel_hlcdc_plane_scaler_set_phicoeff(plane,
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+ state->crtc_w < state->src_w ?
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+ heo_downscaling_xcoef :
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+ heo_upscaling_xcoef,
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+ ARRAY_SIZE(heo_upscaling_xcoef),
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+ desc->layout.phicoeffs.x);
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+
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+ atmel_hlcdc_plane_scaler_set_phicoeff(plane,
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+ state->crtc_h < state->src_h ?
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+ heo_downscaling_ycoef :
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+ heo_upscaling_ycoef,
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+ ARRAY_SIZE(heo_upscaling_ycoef),
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+ desc->layout.phicoeffs.y);
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} else {
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- atmel_hlcdc_layer_update_cfg(&plane->layer, 13, 0xffffffff, 0);
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+ xfactor = (1024 * state->src_w) / state->crtc_w;
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+ yfactor = (1024 * state->src_h) / state->crtc_h;
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}
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+
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+ atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config,
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+ ATMEL_HLCDC_LAYER_SCALER_ENABLE |
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+ ATMEL_HLCDC_LAYER_SCALER_FACTORS(xfactor,
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+ yfactor));
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+}
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+
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+static void
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+atmel_hlcdc_plane_update_pos_and_size(struct atmel_hlcdc_plane *plane,
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+ struct atmel_hlcdc_plane_state *state)
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+{
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+ const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
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+
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+ if (desc->layout.size)
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+ atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.size,
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+ ATMEL_HLCDC_LAYER_SIZE(state->crtc_w,
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+ state->crtc_h));
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+
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+ if (desc->layout.memsize)
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+ atmel_hlcdc_layer_write_cfg(&plane->layer,
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+ desc->layout.memsize,
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+ ATMEL_HLCDC_LAYER_SIZE(state->src_w,
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+ state->src_h));
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+
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+ if (desc->layout.pos)
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+ atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.pos,
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+ ATMEL_HLCDC_LAYER_POS(state->crtc_x,
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+ state->crtc_y));
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+
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+ atmel_hlcdc_plane_setup_scaler(plane, state);
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}
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static void
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atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,
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struct atmel_hlcdc_plane_state *state)
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{
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- const struct atmel_hlcdc_layer_cfg_layout *layout =
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- &plane->layer.desc->layout;
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- unsigned int cfg = ATMEL_HLCDC_LAYER_DMA;
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+ unsigned int cfg = ATMEL_HLCDC_LAYER_DMA_BLEN_INCR16 | state->ahb_id;
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+ const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
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+ u32 format = state->base.fb->format->format;
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+
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+ /*
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+ * Rotation optimization is not working on RGB888 (rotation is still
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+ * working but without any optimization).
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+ */
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+ if (format == DRM_FORMAT_RGB888)
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+ cfg |= ATMEL_HLCDC_LAYER_DMA_ROTDIS;
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+
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+ atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG,
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+ cfg);
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+
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+ cfg = ATMEL_HLCDC_LAYER_DMA;
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if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {
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cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |
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ATMEL_HLCDC_LAYER_ITER;
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- if (atmel_hlcdc_format_embeds_alpha(state->base.fb->format->format))
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+ if (atmel_hlcdc_format_embeds_alpha(format))
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cfg |= ATMEL_HLCDC_LAYER_LAEN;
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else
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cfg |= ATMEL_HLCDC_LAYER_GAEN |
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ATMEL_HLCDC_LAYER_GA(state->alpha);
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}
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- ATMEL_HLCDC_LAYER_DMA_CFG_ID,
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- ATMEL_HLCDC_LAYER_DMA_BLEN_MASK |
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- ATMEL_HLCDC_LAYER_DMA_SIF,
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- ATMEL_HLCDC_LAYER_DMA_BLEN_INCR16 |
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- state->ahb_id);
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-
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- atmel_hlcdc_layer_update_cfg(&plane->layer, layout->general_config,
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- ATMEL_HLCDC_LAYER_ITER2BL |
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- ATMEL_HLCDC_LAYER_ITER |
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- ATMEL_HLCDC_LAYER_GAEN |
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- ATMEL_HLCDC_LAYER_GA_MASK |
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- ATMEL_HLCDC_LAYER_LAEN |
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- ATMEL_HLCDC_LAYER_OVR |
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- ATMEL_HLCDC_LAYER_DMA, cfg);
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+ if (state->disc_h && state->disc_w)
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+ cfg |= ATMEL_HLCDC_LAYER_DISCEN;
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+
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+ atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.general_config,
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+ cfg);
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}
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static void atmel_hlcdc_plane_update_format(struct atmel_hlcdc_plane *plane,
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@@ -396,50 +420,50 @@ static void atmel_hlcdc_plane_update_format(struct atmel_hlcdc_plane *plane,
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drm_rotation_90_or_270(state->base.rotation))
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cfg |= ATMEL_HLCDC_YUV422ROT;
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- ATMEL_HLCDC_LAYER_FORMAT_CFG_ID,
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- 0xffffffff,
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- cfg);
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-
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- /*
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- * Rotation optimization is not working on RGB888 (rotation is still
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- * working but without any optimization).
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- */
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- if (state->base.fb->format->format == DRM_FORMAT_RGB888)
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- cfg = ATMEL_HLCDC_LAYER_DMA_ROTDIS;
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- else
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- cfg = 0;
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-
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- ATMEL_HLCDC_LAYER_DMA_CFG_ID,
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- ATMEL_HLCDC_LAYER_DMA_ROTDIS, cfg);
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+ atmel_hlcdc_layer_write_cfg(&plane->layer,
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+ ATMEL_HLCDC_LAYER_FORMAT_CFG, cfg);
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}
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static void atmel_hlcdc_plane_update_buffers(struct atmel_hlcdc_plane *plane,
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struct atmel_hlcdc_plane_state *state)
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{
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- struct atmel_hlcdc_layer *layer = &plane->layer;
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- const struct atmel_hlcdc_layer_cfg_layout *layout =
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- &layer->desc->layout;
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+ const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
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+ struct drm_framebuffer *fb = state->base.fb;
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+ u32 sr;
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int i;
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- atmel_hlcdc_layer_update_set_fb(&plane->layer, state->base.fb,
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- state->offsets);
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+ sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR);
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for (i = 0; i < state->nplanes; i++) {
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- if (layout->xstride[i]) {
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- layout->xstride[i],
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- 0xffffffff,
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- state->xstride[i]);
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+ struct drm_gem_cma_object *gem = drm_fb_cma_get_gem_obj(fb, i);
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+
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+ state->dscrs[i]->addr = gem->paddr + state->offsets[i];
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+
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+ atmel_hlcdc_layer_write_reg(&plane->layer,
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+ ATMEL_HLCDC_LAYER_PLANE_HEAD(i),
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+ state->dscrs[i]->self);
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+
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+ if (!(sr & ATMEL_HLCDC_LAYER_EN)) {
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+ atmel_hlcdc_layer_write_reg(&plane->layer,
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+ ATMEL_HLCDC_LAYER_PLANE_ADDR(i),
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+ state->dscrs[i]->addr);
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+ atmel_hlcdc_layer_write_reg(&plane->layer,
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+ ATMEL_HLCDC_LAYER_PLANE_CTRL(i),
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+ state->dscrs[i]->ctrl);
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+ atmel_hlcdc_layer_write_reg(&plane->layer,
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+ ATMEL_HLCDC_LAYER_PLANE_NEXT(i),
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+ state->dscrs[i]->self);
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}
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- if (layout->pstride[i]) {
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- layout->pstride[i],
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- 0xffffffff,
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- state->pstride[i]);
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- }
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+ if (desc->layout.xstride[i])
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+ atmel_hlcdc_layer_write_cfg(&plane->layer,
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+ desc->layout.xstride[i],
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+ state->xstride[i]);
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+
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+ if (desc->layout.pstride[i])
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+ atmel_hlcdc_layer_write_cfg(&plane->layer,
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+ desc->layout.pstride[i],
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+ state->pstride[i]);
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}
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}
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@@ -528,18 +552,10 @@ atmel_hlcdc_plane_prepare_disc_area(struct drm_crtc_state *c_state)
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disc_w = ovl_state->crtc_w;
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}
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- if (disc_x == primary_state->disc_x &&
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- disc_y == primary_state->disc_y &&
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- disc_w == primary_state->disc_w &&
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- disc_h == primary_state->disc_h)
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- return 0;
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-
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-
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primary_state->disc_x = disc_x;
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primary_state->disc_y = disc_y;
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primary_state->disc_w = disc_w;
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primary_state->disc_h = disc_h;
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- primary_state->disc_updated = true;
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return 0;
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}
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@@ -548,32 +564,19 @@ static void
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atmel_hlcdc_plane_update_disc_area(struct atmel_hlcdc_plane *plane,
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struct atmel_hlcdc_plane_state *state)
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{
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- const struct atmel_hlcdc_layer_cfg_layout *layout =
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- &plane->layer.desc->layout;
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- int disc_surface = 0;
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-
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- if (!state->disc_updated)
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- return;
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-
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- disc_surface = state->disc_h * state->disc_w;
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-
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- atmel_hlcdc_layer_update_cfg(&plane->layer, layout->general_config,
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- ATMEL_HLCDC_LAYER_DISCEN,
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- disc_surface ? ATMEL_HLCDC_LAYER_DISCEN : 0);
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+ const struct atmel_hlcdc_layer_cfg_layout *layout;
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- if (!disc_surface)
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+ layout = &plane->layer.desc->layout;
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+ if (!layout->disc_pos || !layout->disc_size)
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return;
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- layout->disc_pos,
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- 0xffffffff,
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- state->disc_x | (state->disc_y << 16));
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+ atmel_hlcdc_layer_write_cfg(&plane->layer, layout->disc_pos,
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+ ATMEL_HLCDC_LAYER_DISC_POS(state->disc_x,
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+ state->disc_y));
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- atmel_hlcdc_layer_update_cfg(&plane->layer,
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- layout->disc_size,
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- 0xffffffff,
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- (state->disc_w - 1) |
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- ((state->disc_h - 1) << 16));
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+ atmel_hlcdc_layer_write_cfg(&plane->layer, layout->disc_size,
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+ ATMEL_HLCDC_LAYER_DISC_SIZE(state->disc_w,
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+ state->disc_h));
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}
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static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
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@@ -582,8 +585,7 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
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struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
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struct atmel_hlcdc_plane_state *state =
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drm_plane_state_to_atmel_hlcdc_plane_state(s);
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- const struct atmel_hlcdc_layer_cfg_layout *layout =
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- &plane->layer.desc->layout;
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+ const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
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struct drm_framebuffer *fb = state->base.fb;
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const struct drm_display_mode *mode;
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struct drm_crtc_state *crtc_state;
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@@ -622,7 +624,7 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
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state->src_h >>= 16;
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state->nplanes = fb->format->num_planes;
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- if (state->nplanes > ATMEL_HLCDC_MAX_PLANES)
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+ if (state->nplanes > ATMEL_HLCDC_LAYER_MAX_PLANES)
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return -EINVAL;
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/*
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@@ -726,21 +728,19 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
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state->crtc_w = patched_crtc_w;
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state->crtc_h = patched_crtc_h;
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- if (!layout->size &&
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+ if (!desc->layout.size &&
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(mode->hdisplay != state->crtc_w ||
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mode->vdisplay != state->crtc_h))
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return -EINVAL;
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- if (plane->layer.desc->max_height &&
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- state->crtc_h > plane->layer.desc->max_height)
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+ if (desc->max_height && state->crtc_h > desc->max_height)
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return -EINVAL;
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- if (plane->layer.desc->max_width &&
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- state->crtc_w > plane->layer.desc->max_width)
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+ if (desc->max_width && state->crtc_w > desc->max_width)
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return -EINVAL;
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if ((state->crtc_h != state->src_h || state->crtc_w != state->src_w) &&
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- (!layout->memsize ||
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+ (!desc->layout.memsize ||
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atmel_hlcdc_format_embeds_alpha(state->base.fb->format->format)))
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return -EINVAL;
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@@ -754,65 +754,13 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
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return 0;
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}
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-static int atmel_hlcdc_plane_prepare_fb(struct drm_plane *p,
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- struct drm_plane_state *new_state)
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-{
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- /*
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- * FIXME: we should avoid this const -> non-const cast but it's
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- * currently the only solution we have to modify the ->prepared
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- * state and rollback the update request.
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- * Ideally, we should rework the code to attach all the resources
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- * to atmel_hlcdc_plane_state (including the DMA desc allocation),
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- * but this require a complete rework of the atmel_hlcdc_layer
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- * code.
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- */
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- struct drm_plane_state *s = (struct drm_plane_state *)new_state;
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- struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
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- struct atmel_hlcdc_plane_state *state =
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- drm_plane_state_to_atmel_hlcdc_plane_state(s);
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- int ret;
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-
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- ret = atmel_hlcdc_layer_update_start(&plane->layer);
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- if (!ret)
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- state->prepared = true;
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-
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- return ret;
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-}
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-
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-static void atmel_hlcdc_plane_cleanup_fb(struct drm_plane *p,
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- struct drm_plane_state *old_state)
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-{
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- /*
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- * FIXME: we should avoid this const -> non-const cast but it's
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- * currently the only solution we have to modify the ->prepared
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- * state and rollback the update request.
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- * Ideally, we should rework the code to attach all the resources
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- * to atmel_hlcdc_plane_state (including the DMA desc allocation),
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- * but this require a complete rework of the atmel_hlcdc_layer
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- * code.
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- */
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- struct drm_plane_state *s = (struct drm_plane_state *)old_state;
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- struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
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- struct atmel_hlcdc_plane_state *state =
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- drm_plane_state_to_atmel_hlcdc_plane_state(s);
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-
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- /*
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- * The Request has already been applied or cancelled, nothing to do
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- * here.
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- */
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- if (!state->prepared)
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- return;
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-
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- atmel_hlcdc_layer_update_rollback(&plane->layer);
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- state->prepared = false;
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-}
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-
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static void atmel_hlcdc_plane_atomic_update(struct drm_plane *p,
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struct drm_plane_state *old_s)
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{
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struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
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struct atmel_hlcdc_plane_state *state =
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drm_plane_state_to_atmel_hlcdc_plane_state(p->state);
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+ u32 sr;
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if (!p->state->crtc || !p->state->fb)
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return;
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@@ -823,7 +771,18 @@ static void atmel_hlcdc_plane_atomic_update(struct drm_plane *p,
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atmel_hlcdc_plane_update_buffers(plane, state);
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atmel_hlcdc_plane_update_disc_area(plane, state);
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- atmel_hlcdc_layer_update_commit(&plane->layer);
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+ /* Enable the overrun interrupts. */
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+ atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IER,
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+ ATMEL_HLCDC_LAYER_OVR_IRQ(0) |
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+ ATMEL_HLCDC_LAYER_OVR_IRQ(1) |
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+ ATMEL_HLCDC_LAYER_OVR_IRQ(2));
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+
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+ /* Apply the new config at the next SOF event. */
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+ sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR);
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+ atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHER,
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+ ATMEL_HLCDC_LAYER_UPDATE |
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+ (sr & ATMEL_HLCDC_LAYER_EN ?
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+ ATMEL_HLCDC_LAYER_A2Q : ATMEL_HLCDC_LAYER_EN));
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}
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static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p,
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@@ -831,7 +790,18 @@ static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p,
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{
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struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
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- atmel_hlcdc_layer_disable(&plane->layer);
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+ /* Disable interrupts */
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+ atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IDR,
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+ 0xffffffff);
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+
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+ /* Disable the layer */
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+ atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR,
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+ ATMEL_HLCDC_LAYER_RST |
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+ ATMEL_HLCDC_LAYER_A2Q |
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+ ATMEL_HLCDC_LAYER_UPDATE);
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+
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+ /* Clear all pending interrupts */
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+ atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR);
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}
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static void atmel_hlcdc_plane_destroy(struct drm_plane *p)
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@@ -841,10 +811,7 @@ static void atmel_hlcdc_plane_destroy(struct drm_plane *p)
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if (plane->base.fb)
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drm_framebuffer_unreference(plane->base.fb);
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- atmel_hlcdc_layer_cleanup(p->dev, &plane->layer);
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-
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drm_plane_cleanup(p);
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- devm_kfree(p->dev->dev, plane);
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}
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static int atmel_hlcdc_plane_atomic_set_property(struct drm_plane *p,
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@@ -884,24 +851,15 @@ static int atmel_hlcdc_plane_atomic_get_property(struct drm_plane *p,
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}
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static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane,
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- const struct atmel_hlcdc_layer_desc *desc,
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- struct atmel_hlcdc_plane_properties *props)
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+ struct atmel_hlcdc_plane_properties *props)
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{
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- struct regmap *regmap = plane->layer.hlcdc->regmap;
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+ const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
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if (desc->type == ATMEL_HLCDC_OVERLAY_LAYER ||
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- desc->type == ATMEL_HLCDC_CURSOR_LAYER) {
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+ desc->type == ATMEL_HLCDC_CURSOR_LAYER)
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drm_object_attach_property(&plane->base.base,
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props->alpha, 255);
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- /* Set default alpha value */
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- regmap_update_bits(regmap,
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- desc->regs_offset +
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- ATMEL_HLCDC_LAYER_GENERAL_CFG(&plane->layer),
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- ATMEL_HLCDC_LAYER_GA_MASK,
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- ATMEL_HLCDC_LAYER_GA_MASK);
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- }
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-
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if (desc->layout.xstride && desc->layout.pstride) {
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int ret;
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@@ -920,31 +878,78 @@ static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane,
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* TODO: decare a "yuv-to-rgb-conv-factors" property to let
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* userspace modify these factors (using a BLOB property ?).
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*/
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- regmap_write(regmap,
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- desc->regs_offset +
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- ATMEL_HLCDC_LAYER_CSC_CFG(&plane->layer, 0),
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- 0x4c900091);
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- regmap_write(regmap,
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- desc->regs_offset +
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- ATMEL_HLCDC_LAYER_CSC_CFG(&plane->layer, 1),
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- 0x7a5f5090);
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- regmap_write(regmap,
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- desc->regs_offset +
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- ATMEL_HLCDC_LAYER_CSC_CFG(&plane->layer, 2),
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- 0x40040890);
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+ atmel_hlcdc_layer_write_cfg(&plane->layer,
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+ desc->layout.csc,
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+ 0x4c900091);
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+ atmel_hlcdc_layer_write_cfg(&plane->layer,
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+ desc->layout.csc + 1,
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+ 0x7a5f5090);
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+ atmel_hlcdc_layer_write_cfg(&plane->layer,
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+ desc->layout.csc + 2,
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+ 0x40040890);
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}
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return 0;
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}
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|
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+void atmel_hlcdc_plane_irq(struct atmel_hlcdc_plane *plane)
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+{
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+ const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
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+ u32 isr;
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+
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+ isr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR);
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+
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+ /*
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+ * There's not much we can do in case of overrun except informing
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+ * the user. However, we are in interrupt context here, hence the
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+ * use of dev_dbg().
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+ */
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+ if (isr &
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+ (ATMEL_HLCDC_LAYER_OVR_IRQ(0) | ATMEL_HLCDC_LAYER_OVR_IRQ(1) |
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|
+ ATMEL_HLCDC_LAYER_OVR_IRQ(2)))
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|
|
+ dev_dbg(plane->base.dev->dev, "overrun on plane %s\n",
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|
+ desc->name);
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|
+}
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|
+
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|
|
static struct drm_plane_helper_funcs atmel_hlcdc_layer_plane_helper_funcs = {
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|
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- .prepare_fb = atmel_hlcdc_plane_prepare_fb,
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- .cleanup_fb = atmel_hlcdc_plane_cleanup_fb,
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.atomic_check = atmel_hlcdc_plane_atomic_check,
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.atomic_update = atmel_hlcdc_plane_atomic_update,
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.atomic_disable = atmel_hlcdc_plane_atomic_disable,
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};
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|
|
|
|
|
+static int atmel_hlcdc_plane_alloc_dscrs(struct drm_plane *p,
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+ struct atmel_hlcdc_plane_state *state)
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|
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+{
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|
|
+ struct atmel_hlcdc_dc *dc = p->dev->dev_private;
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|
|
+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(state->dscrs); i++) {
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|
|
+ struct atmel_hlcdc_dma_channel_dscr *dscr;
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|
|
+ dma_addr_t dscr_dma;
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|
+
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|
|
+ dscr = dma_pool_alloc(dc->dscrpool, GFP_KERNEL, &dscr_dma);
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|
|
+ if (!dscr)
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|
|
+ goto err;
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|
|
+
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|
|
+ dscr->addr = 0;
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|
|
+ dscr->next = dscr_dma;
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|
|
+ dscr->self = dscr_dma;
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|
|
+ dscr->ctrl = ATMEL_HLCDC_LAYER_DFETCH;
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|
|
+
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|
|
+ state->dscrs[i] = dscr;
|
|
|
+ }
|
|
|
+
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|
|
+ return 0;
|
|
|
+
|
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|
+err:
|
|
|
+ for (i--; i >= 0; i--) {
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|
|
+ dma_pool_free(dc->dscrpool, state->dscrs[i],
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|
|
+ state->dscrs[i]->self);
|
|
|
+ }
|
|
|
+
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|
|
+ return -ENOMEM;
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|
|
+}
|
|
|
+
|
|
|
static void atmel_hlcdc_plane_reset(struct drm_plane *p)
|
|
|
{
|
|
|
struct atmel_hlcdc_plane_state *state;
|
|
@@ -961,6 +966,13 @@ static void atmel_hlcdc_plane_reset(struct drm_plane *p)
|
|
|
|
|
|
state = kzalloc(sizeof(*state), GFP_KERNEL);
|
|
|
if (state) {
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|
|
+ if (atmel_hlcdc_plane_alloc_dscrs(p, state)) {
|
|
|
+ kfree(state);
|
|
|
+ dev_err(p->dev->dev,
|
|
|
+ "Failed to allocate initial plane state\n");
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
state->alpha = 255;
|
|
|
p->state = &state->base;
|
|
|
p->state->plane = p;
|
|
@@ -978,8 +990,10 @@ atmel_hlcdc_plane_atomic_duplicate_state(struct drm_plane *p)
|
|
|
if (!copy)
|
|
|
return NULL;
|
|
|
|
|
|
- copy->disc_updated = false;
|
|
|
- copy->prepared = false;
|
|
|
+ if (atmel_hlcdc_plane_alloc_dscrs(p, copy)) {
|
|
|
+ kfree(copy);
|
|
|
+ return NULL;
|
|
|
+ }
|
|
|
|
|
|
if (copy->base.fb)
|
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drm_framebuffer_reference(copy->base.fb);
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@@ -987,11 +1001,18 @@ atmel_hlcdc_plane_atomic_duplicate_state(struct drm_plane *p)
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return ©->base;
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}
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-static void atmel_hlcdc_plane_atomic_destroy_state(struct drm_plane *plane,
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+static void atmel_hlcdc_plane_atomic_destroy_state(struct drm_plane *p,
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struct drm_plane_state *s)
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{
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struct atmel_hlcdc_plane_state *state =
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drm_plane_state_to_atmel_hlcdc_plane_state(s);
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+ struct atmel_hlcdc_dc *dc = p->dev->dev_private;
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(state->dscrs); i++) {
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+ dma_pool_free(dc->dscrpool, state->dscrs[i],
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+ state->dscrs[i]->self);
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+ }
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if (s->fb)
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drm_framebuffer_unreference(s->fb);
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@@ -1011,22 +1032,21 @@ static struct drm_plane_funcs layer_plane_funcs = {
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.atomic_get_property = atmel_hlcdc_plane_atomic_get_property,
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};
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-static struct atmel_hlcdc_plane *
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-atmel_hlcdc_plane_create(struct drm_device *dev,
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- const struct atmel_hlcdc_layer_desc *desc,
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- struct atmel_hlcdc_plane_properties *props)
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+static int atmel_hlcdc_plane_create(struct drm_device *dev,
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+ const struct atmel_hlcdc_layer_desc *desc,
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+ struct atmel_hlcdc_plane_properties *props)
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{
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+ struct atmel_hlcdc_dc *dc = dev->dev_private;
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struct atmel_hlcdc_plane *plane;
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enum drm_plane_type type;
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int ret;
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plane = devm_kzalloc(dev->dev, sizeof(*plane), GFP_KERNEL);
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if (!plane)
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- return ERR_PTR(-ENOMEM);
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+ return -ENOMEM;
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- ret = atmel_hlcdc_layer_init(dev, &plane->layer, desc);
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- if (ret)
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- return ERR_PTR(ret);
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+ atmel_hlcdc_layer_init(&plane->layer, desc, dc->hlcdc->regmap);
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+ plane->properties = props;
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if (desc->type == ATMEL_HLCDC_BASE_LAYER)
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type = DRM_PLANE_TYPE_PRIMARY;
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@@ -1040,17 +1060,19 @@ atmel_hlcdc_plane_create(struct drm_device *dev,
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desc->formats->formats,
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desc->formats->nformats, type, NULL);
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if (ret)
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- return ERR_PTR(ret);
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+ return ret;
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drm_plane_helper_add(&plane->base,
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&atmel_hlcdc_layer_plane_helper_funcs);
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/* Set default property values*/
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- ret = atmel_hlcdc_plane_init_properties(plane, desc, props);
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+ ret = atmel_hlcdc_plane_init_properties(plane, props);
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if (ret)
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- return ERR_PTR(ret);
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+ return ret;
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+
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+ dc->layers[desc->id] = &plane->layer;
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- return plane;
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+ return 0;
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}
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static struct atmel_hlcdc_plane_properties *
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@@ -1069,72 +1091,34 @@ atmel_hlcdc_plane_create_properties(struct drm_device *dev)
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return props;
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}
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-struct atmel_hlcdc_planes *
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-atmel_hlcdc_create_planes(struct drm_device *dev)
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+int atmel_hlcdc_create_planes(struct drm_device *dev)
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{
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struct atmel_hlcdc_dc *dc = dev->dev_private;
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struct atmel_hlcdc_plane_properties *props;
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- struct atmel_hlcdc_planes *planes;
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const struct atmel_hlcdc_layer_desc *descs = dc->desc->layers;
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int nlayers = dc->desc->nlayers;
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- int i;
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-
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- planes = devm_kzalloc(dev->dev, sizeof(*planes), GFP_KERNEL);
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- if (!planes)
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- return ERR_PTR(-ENOMEM);
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-
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- for (i = 0; i < nlayers; i++) {
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- if (descs[i].type == ATMEL_HLCDC_OVERLAY_LAYER)
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- planes->noverlays++;
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- }
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-
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- if (planes->noverlays) {
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- planes->overlays = devm_kzalloc(dev->dev,
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- planes->noverlays *
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- sizeof(*planes->overlays),
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- GFP_KERNEL);
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- if (!planes->overlays)
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- return ERR_PTR(-ENOMEM);
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- }
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+ int i, ret;
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props = atmel_hlcdc_plane_create_properties(dev);
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if (IS_ERR(props))
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- return ERR_CAST(props);
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+ return PTR_ERR(props);
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- planes->noverlays = 0;
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- for (i = 0; i < nlayers; i++) {
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- struct atmel_hlcdc_plane *plane;
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+ dc->dscrpool = dmam_pool_create("atmel-hlcdc-dscr", dev->dev,
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+ sizeof(struct atmel_hlcdc_dma_channel_dscr),
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+ sizeof(u64), 0);
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+ if (!dc->dscrpool)
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+ return -ENOMEM;
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- if (descs[i].type == ATMEL_HLCDC_PP_LAYER)
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+ for (i = 0; i < nlayers; i++) {
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+ if (descs[i].type != ATMEL_HLCDC_BASE_LAYER &&
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+ descs[i].type != ATMEL_HLCDC_OVERLAY_LAYER &&
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+ descs[i].type != ATMEL_HLCDC_CURSOR_LAYER)
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continue;
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- plane = atmel_hlcdc_plane_create(dev, &descs[i], props);
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- if (IS_ERR(plane))
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- return ERR_CAST(plane);
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-
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- plane->properties = props;
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-
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- switch (descs[i].type) {
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- case ATMEL_HLCDC_BASE_LAYER:
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- if (planes->primary)
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- return ERR_PTR(-EINVAL);
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- planes->primary = plane;
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- break;
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-
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- case ATMEL_HLCDC_OVERLAY_LAYER:
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- planes->overlays[planes->noverlays++] = plane;
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- break;
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-
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- case ATMEL_HLCDC_CURSOR_LAYER:
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- if (planes->cursor)
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- return ERR_PTR(-EINVAL);
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- planes->cursor = plane;
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- break;
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-
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- default:
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- break;
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- }
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+ ret = atmel_hlcdc_plane_create(dev, &descs[i], props);
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+ if (ret)
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+ return ret;
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}
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- return planes;
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+ return 0;
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}
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