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@@ -60,7 +60,7 @@ static u32 ticks_per_jiffy;
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* at least 7.5ns (133MHz TCLK).
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*/
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-static u32 notrace orion_read_sched_clock(void)
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+static u64 notrace orion_read_sched_clock(void)
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{
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return ~readl(timer_base + TIMER0_VAL_OFF);
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}
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@@ -201,7 +201,7 @@ orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask,
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/*
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* Set scale and timer for sched_clock.
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*/
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- setup_sched_clock(orion_read_sched_clock, 32, tclk);
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+ sched_clock_register(orion_read_sched_clock, 32, tclk);
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/*
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* Setup free-running clocksource timer (interrupts
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