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@@ -46,6 +46,7 @@
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#define OPREGION_SWSCI_OFFSET 0x200
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#define OPREGION_ASLE_OFFSET 0x300
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#define OPREGION_VBT_OFFSET 0x400
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+#define OPREGION_ASLE_EXT_OFFSET 0x1C00
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#define OPREGION_SIGNATURE "IntelGraphicsMem"
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#define MBOX_ACPI (1<<0)
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@@ -125,6 +126,13 @@ struct opregion_asle {
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u8 rsvd[58];
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} __packed;
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+/* OpRegion mailbox #5: ASLE ext */
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+struct opregion_asle_ext {
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+ u32 phed; /* Panel Header */
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+ u8 bddc[256]; /* Panel EDID */
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+ u8 rsvd[764];
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+} __packed;
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+
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/* Driver readiness indicator */
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#define ASLE_ARDY_READY (1 << 0)
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#define ASLE_ARDY_NOT_READY (0 << 0)
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@@ -909,6 +917,7 @@ int intel_opregion_setup(struct drm_device *dev)
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BUILD_BUG_ON(sizeof(struct opregion_acpi) != 0x100);
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BUILD_BUG_ON(sizeof(struct opregion_swsci) != 0x100);
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BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100);
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+ BUILD_BUG_ON(sizeof(struct opregion_asle_ext) != 0x400);
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pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
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DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
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@@ -948,6 +957,7 @@ int intel_opregion_setup(struct drm_device *dev)
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opregion->swsci = base + OPREGION_SWSCI_OFFSET;
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swsci_setup(dev);
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}
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+
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if (mboxes & MBOX_ASLE) {
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DRM_DEBUG_DRIVER("ASLE supported\n");
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opregion->asle = base + OPREGION_ASLE_OFFSET;
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@@ -955,6 +965,9 @@ int intel_opregion_setup(struct drm_device *dev)
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opregion->asle->ardy = ASLE_ARDY_NOT_READY;
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}
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+ if (mboxes & MBOX_ASLE_EXT)
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+ DRM_DEBUG_DRIVER("ASLE extension supported\n");
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+
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return 0;
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err_out:
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