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@@ -102,6 +102,28 @@ enum {
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DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
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DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
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};
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};
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+/**
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+ * enum pci_interrupt_pin - PCI INTx interrupt values
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+ * @PCI_INTERRUPT_UNKNOWN: Unknown or unassigned interrupt
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+ * @PCI_INTERRUPT_INTA: PCI INTA pin
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+ * @PCI_INTERRUPT_INTB: PCI INTB pin
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+ * @PCI_INTERRUPT_INTC: PCI INTC pin
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+ * @PCI_INTERRUPT_INTD: PCI INTD pin
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+ *
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+ * Corresponds to values for legacy PCI INTx interrupts, as can be found in the
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+ * PCI_INTERRUPT_PIN register.
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+ */
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+enum pci_interrupt_pin {
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+ PCI_INTERRUPT_UNKNOWN,
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+ PCI_INTERRUPT_INTA,
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+ PCI_INTERRUPT_INTB,
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+ PCI_INTERRUPT_INTC,
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+ PCI_INTERRUPT_INTD,
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+};
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+
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+/* The number of legacy PCI INTx interrupts */
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+#define PCI_NUM_INTX 4
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+
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/*
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/*
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* pci_power_t values must match the bits in the Capabilities PME_Support
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* pci_power_t values must match the bits in the Capabilities PME_Support
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* and Control/Status PowerState fields in the Power Management capability.
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* and Control/Status PowerState fields in the Power Management capability.
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