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@@ -289,8 +289,8 @@ static void sdma_v4_0_ring_set_wptr(struct amdgpu_ring *ring)
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"mmSDMA%i_GFX_RB_WPTR == 0x%08x "
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"mmSDMA%i_GFX_RB_WPTR_HI == 0x%08x \n",
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me,
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- me,
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lower_32_bits(ring->wptr << 2),
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+ me,
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upper_32_bits(ring->wptr << 2));
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WREG32(sdma_v4_0_get_reg_offset(me, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2));
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WREG32(sdma_v4_0_get_reg_offset(me, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));
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