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@@ -3530,10 +3530,17 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
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pp_div_reg = VLV_PIPE_PP_DIVISOR(pipe);
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pp_div_reg = VLV_PIPE_PP_DIVISOR(pipe);
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}
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}
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- /* And finally store the new values in the power sequencer. */
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+ /*
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+ * And finally store the new values in the power sequencer. The
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+ * backlight delays are set to 1 because we do manual waits on them. For
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+ * T8, even BSpec recommends doing it. For T9, if we don't do this,
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+ * we'll end up waiting for the backlight off delay twice: once when we
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+ * do the manual sleep, and once when we disable the panel and wait for
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+ * the PP_STATUS bit to become zero.
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+ */
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pp_on = (seq->t1_t3 << PANEL_POWER_UP_DELAY_SHIFT) |
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pp_on = (seq->t1_t3 << PANEL_POWER_UP_DELAY_SHIFT) |
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- (seq->t8 << PANEL_LIGHT_ON_DELAY_SHIFT);
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- pp_off = (seq->t9 << PANEL_LIGHT_OFF_DELAY_SHIFT) |
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+ (1 << PANEL_LIGHT_ON_DELAY_SHIFT);
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+ pp_off = (1 << PANEL_LIGHT_OFF_DELAY_SHIFT) |
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(seq->t10 << PANEL_POWER_DOWN_DELAY_SHIFT);
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(seq->t10 << PANEL_POWER_DOWN_DELAY_SHIFT);
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/* Compute the divisor for the pp clock, simply match the Bspec
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/* Compute the divisor for the pp clock, simply match the Bspec
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* formula. */
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* formula. */
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