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@@ -587,6 +587,7 @@ static size_t arm_v7s_split_blk_unmap(struct arm_v7s_io_pgtable *data,
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}
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}
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io_pgtable_tlb_add_flush(&data->iop, iova, size, size, true);
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io_pgtable_tlb_add_flush(&data->iop, iova, size, size, true);
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+ io_pgtable_tlb_sync(&data->iop);
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return size;
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return size;
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}
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}
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@@ -642,6 +643,13 @@ static size_t __arm_v7s_unmap(struct arm_v7s_io_pgtable *data,
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io_pgtable_tlb_sync(iop);
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io_pgtable_tlb_sync(iop);
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ptep = iopte_deref(pte[i], lvl);
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ptep = iopte_deref(pte[i], lvl);
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__arm_v7s_free_table(ptep, lvl + 1, data);
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__arm_v7s_free_table(ptep, lvl + 1, data);
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+ } else if (iop->cfg.quirks & IO_PGTABLE_QUIRK_NON_STRICT) {
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+ /*
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+ * Order the PTE update against queueing the IOVA, to
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+ * guarantee that a flush callback from a different CPU
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+ * has observed it before the TLBIALL can be issued.
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+ */
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+ smp_wmb();
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} else {
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} else {
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io_pgtable_tlb_add_flush(iop, iova, blk_size,
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io_pgtable_tlb_add_flush(iop, iova, blk_size,
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blk_size, true);
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blk_size, true);
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@@ -712,7 +720,8 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
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IO_PGTABLE_QUIRK_NO_PERMS |
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IO_PGTABLE_QUIRK_NO_PERMS |
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IO_PGTABLE_QUIRK_TLBI_ON_MAP |
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IO_PGTABLE_QUIRK_TLBI_ON_MAP |
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IO_PGTABLE_QUIRK_ARM_MTK_4GB |
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IO_PGTABLE_QUIRK_ARM_MTK_4GB |
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- IO_PGTABLE_QUIRK_NO_DMA))
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+ IO_PGTABLE_QUIRK_NO_DMA |
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+ IO_PGTABLE_QUIRK_NON_STRICT))
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return NULL;
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return NULL;
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/* If ARM_MTK_4GB is enabled, the NO_PERMS is also expected. */
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/* If ARM_MTK_4GB is enabled, the NO_PERMS is also expected. */
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