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@@ -3375,7 +3375,6 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
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{
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struct protection_domain *domain = dom->priv;
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unsigned long offset_mask, pte_pgsize;
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- phys_addr_t paddr;
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u64 *pte, __pte;
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if (domain->mode == PAGE_MODE_NONE)
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@@ -3386,15 +3385,10 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
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if (!pte || !IOMMU_PTE_PRESENT(*pte))
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return 0;
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- if (PM_PTE_LEVEL(*pte) == 0)
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- offset_mask = PAGE_SIZE - 1;
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- else
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- offset_mask = PTE_PAGE_SIZE(*pte) - 1;
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-
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- __pte = *pte & PM_ADDR_MASK;
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- paddr = (__pte & ~offset_mask) | (iova & offset_mask);
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+ offset_mask = pte_pgsize - 1;
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+ __pte = *pte & PM_ADDR_MASK;
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- return paddr;
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+ return (__pte & ~offset_mask) | (iova & offset_mask);
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}
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static bool amd_iommu_capable(enum iommu_cap cap)
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