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@@ -2726,6 +2726,23 @@ intel_set_plane_visible(struct intel_crtc_state *crtc_state,
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crtc_state->active_planes);
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crtc_state->active_planes);
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}
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}
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+static void intel_plane_disable_noatomic(struct intel_crtc *crtc,
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+ struct intel_plane *plane)
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+{
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+ struct intel_crtc_state *crtc_state =
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+ to_intel_crtc_state(crtc->base.state);
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+ struct intel_plane_state *plane_state =
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+ to_intel_plane_state(plane->base.state);
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+
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+ intel_set_plane_visible(crtc_state, plane_state, false);
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+
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+ if (plane->id == PLANE_PRIMARY)
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+ intel_pre_disable_primary_noatomic(&crtc->base);
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+
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+ trace_intel_disable_plane(&plane->base, crtc);
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+ plane->disable_plane(plane, crtc);
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+}
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+
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static void
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static void
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intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
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intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
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struct intel_initial_plane_config *plane_config)
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struct intel_initial_plane_config *plane_config)
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@@ -2783,12 +2800,7 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
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* simplest solution is to just disable the primary plane now and
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* simplest solution is to just disable the primary plane now and
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* pretend the BIOS never had it enabled.
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* pretend the BIOS never had it enabled.
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*/
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*/
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- intel_set_plane_visible(to_intel_crtc_state(crtc_state),
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- to_intel_plane_state(plane_state),
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- false);
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- intel_pre_disable_primary_noatomic(&intel_crtc->base);
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- trace_intel_disable_plane(primary, intel_crtc);
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- intel_plane->disable_plane(intel_plane, intel_crtc);
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+ intel_plane_disable_noatomic(intel_crtc, intel_plane);
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return;
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return;
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@@ -5869,6 +5881,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->dev);
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struct drm_i915_private *dev_priv = to_i915(crtc->dev);
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enum intel_display_power_domain domain;
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enum intel_display_power_domain domain;
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+ struct intel_plane *plane;
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u64 domains;
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u64 domains;
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struct drm_atomic_state *state;
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struct drm_atomic_state *state;
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struct intel_crtc_state *crtc_state;
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struct intel_crtc_state *crtc_state;
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@@ -5877,11 +5890,12 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
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if (!intel_crtc->active)
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if (!intel_crtc->active)
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return;
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return;
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- if (crtc->primary->state->visible) {
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- intel_pre_disable_primary_noatomic(crtc);
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+ for_each_intel_plane_on_crtc(&dev_priv->drm, intel_crtc, plane) {
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+ const struct intel_plane_state *plane_state =
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+ to_intel_plane_state(plane->base.state);
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- intel_crtc_disable_planes(crtc, 1 << drm_plane_index(crtc->primary));
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- crtc->primary->state->visible = false;
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+ if (plane_state->base.visible)
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+ intel_plane_disable_noatomic(intel_crtc, plane);
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}
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}
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state = drm_atomic_state_alloc(crtc->dev);
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state = drm_atomic_state_alloc(crtc->dev);
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@@ -14773,22 +14787,36 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
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POSTING_READ(DPLL(pipe));
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POSTING_READ(DPLL(pipe));
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}
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}
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-static bool
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-intel_check_plane_mapping(struct intel_crtc *crtc)
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+static bool intel_plane_mapping_ok(struct intel_crtc *crtc,
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+ struct intel_plane *primary)
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{
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{
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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- u32 val;
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+ enum plane plane = primary->plane;
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+ u32 val = I915_READ(DSPCNTR(plane));
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- if (INTEL_INFO(dev_priv)->num_pipes == 1)
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- return true;
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+ return (val & DISPLAY_PLANE_ENABLE) == 0 ||
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+ (val & DISPPLANE_SEL_PIPE_MASK) == DISPPLANE_SEL_PIPE(crtc->pipe);
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+}
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- val = I915_READ(DSPCNTR(!crtc->plane));
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+static void
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+intel_sanitize_plane_mapping(struct drm_i915_private *dev_priv)
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+{
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+ struct intel_crtc *crtc;
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- if ((val & DISPLAY_PLANE_ENABLE) &&
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- (!!(val & DISPPLANE_SEL_PIPE_MASK) == crtc->pipe))
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- return false;
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+ if (INTEL_GEN(dev_priv) >= 4)
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+ return;
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- return true;
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+ for_each_intel_crtc(&dev_priv->drm, crtc) {
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+ struct intel_plane *plane =
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+ to_intel_plane(crtc->base.primary);
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+
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+ if (intel_plane_mapping_ok(crtc, plane))
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+ continue;
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+
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+ DRM_DEBUG_KMS("%s attached to the wrong pipe, disabling plane\n",
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+ plane->base.name);
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+ intel_plane_disable_noatomic(crtc, plane);
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+ }
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}
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}
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static bool intel_crtc_has_encoders(struct intel_crtc *crtc)
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static bool intel_crtc_has_encoders(struct intel_crtc *crtc)
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@@ -14844,33 +14872,15 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
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/* Disable everything but the primary plane */
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/* Disable everything but the primary plane */
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for_each_intel_plane_on_crtc(dev, crtc, plane) {
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for_each_intel_plane_on_crtc(dev, crtc, plane) {
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- if (plane->base.type == DRM_PLANE_TYPE_PRIMARY)
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- continue;
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+ const struct intel_plane_state *plane_state =
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+ to_intel_plane_state(plane->base.state);
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- trace_intel_disable_plane(&plane->base, crtc);
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- plane->disable_plane(plane, crtc);
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+ if (plane_state->base.visible &&
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+ plane->base.type != DRM_PLANE_TYPE_PRIMARY)
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+ intel_plane_disable_noatomic(crtc, plane);
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}
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}
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}
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}
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- /* We need to sanitize the plane -> pipe mapping first because this will
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- * disable the crtc (and hence change the state) if it is wrong. Note
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- * that gen4+ has a fixed plane -> pipe mapping. */
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- if (INTEL_GEN(dev_priv) < 4 && !intel_check_plane_mapping(crtc)) {
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- bool plane;
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-
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- DRM_DEBUG_KMS("[CRTC:%d:%s] wrong plane connection detected!\n",
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- crtc->base.base.id, crtc->base.name);
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-
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- /* Pipe has the wrong plane attached and the plane is active.
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- * Temporarily change the plane mapping and disable everything
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- * ... */
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- plane = crtc->plane;
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- crtc->base.primary->state->visible = true;
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- crtc->plane = !plane;
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- intel_crtc_disable_noatomic(&crtc->base, ctx);
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- crtc->plane = plane;
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- }
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-
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/* Adjust the state of the output pipe according to whether we
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/* Adjust the state of the output pipe according to whether we
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* have active connectors/encoders. */
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* have active connectors/encoders. */
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if (crtc->active && !intel_crtc_has_encoders(crtc))
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if (crtc->active && !intel_crtc_has_encoders(crtc))
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@@ -14978,14 +14988,18 @@ void i915_redisable_vga(struct drm_i915_private *dev_priv)
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/* FIXME read out full plane state for all planes */
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/* FIXME read out full plane state for all planes */
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static void readout_plane_state(struct intel_crtc *crtc)
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static void readout_plane_state(struct intel_crtc *crtc)
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{
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{
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- struct intel_plane *primary = to_intel_plane(crtc->base.primary);
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- bool visible;
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+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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+ struct intel_crtc_state *crtc_state =
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+ to_intel_crtc_state(crtc->base.state);
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+ struct intel_plane *plane;
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- visible = crtc->active && primary->get_hw_state(primary);
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+ for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
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+ struct intel_plane_state *plane_state =
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+ to_intel_plane_state(plane->base.state);
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+ bool visible = plane->get_hw_state(plane);
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- intel_set_plane_visible(to_intel_crtc_state(crtc->base.state),
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- to_intel_plane_state(primary->base.state),
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- visible);
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+ intel_set_plane_visible(crtc_state, plane_state, visible);
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+ }
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}
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}
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static void intel_modeset_readout_hw_state(struct drm_device *dev)
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static void intel_modeset_readout_hw_state(struct drm_device *dev)
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@@ -15193,6 +15207,8 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
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/* HW state is read out, now we need to sanitize this mess. */
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/* HW state is read out, now we need to sanitize this mess. */
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get_encoder_power_domains(dev_priv);
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get_encoder_power_domains(dev_priv);
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+ intel_sanitize_plane_mapping(dev_priv);
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+
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for_each_intel_encoder(dev, encoder) {
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for_each_intel_encoder(dev, encoder) {
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intel_sanitize_encoder(encoder);
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intel_sanitize_encoder(encoder);
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}
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}
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