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@@ -266,7 +266,7 @@ static void iwl_pcie_rxmq_restock(struct iwl_trans *trans,
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rxb = list_first_entry(&rxq->rx_free, struct iwl_rx_mem_buffer,
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list);
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list_del(&rxb->list);
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-
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+ rxb->invalid = false;
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/* 12 first bits are expected to be empty */
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WARN_ON(rxb->page_dma & DMA_BIT_MASK(12));
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/* Point to Rx buffer via next RBD in circular buffer */
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@@ -317,6 +317,7 @@ static void iwl_pcie_rxsq_restock(struct iwl_trans *trans,
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rxb = list_first_entry(&rxq->rx_free, struct iwl_rx_mem_buffer,
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list);
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list_del(&rxb->list);
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+ rxb->invalid = false;
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/* Point to Rx buffer via next RBD in circular buffer */
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bd[rxq->write] = iwl_pcie_dma_addr2rbd_ptr(rxb->page_dma);
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@@ -961,6 +962,7 @@ int iwl_pcie_rx_init(struct iwl_trans *trans)
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list_add(&rxb->list, &def_rxq->rx_used);
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trans_pcie->global_table[i] = rxb;
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rxb->vid = (u16)(i + 1);
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+ rxb->invalid = true;
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}
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iwl_pcie_rxq_alloc_rbs(trans, GFP_KERNEL, def_rxq);
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@@ -1256,6 +1258,12 @@ restart:
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goto out;
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}
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rxb = trans_pcie->global_table[vid - 1];
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+ if (WARN(rxb->invalid,
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+ "Invalid rxb from HW %u\n", (u32)vid)) {
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+ iwl_force_nmi(trans);
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+ goto out;
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+ }
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+ rxb->invalid = true;
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} else {
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rxb = rxq->queue[i];
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rxq->queue[i] = NULL;
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