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@@ -120,37 +120,6 @@
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mov \tmp1, \tmp1, lsr #8
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.endm
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-/* Macro to resume & re-enable L2 cache */
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-#ifndef L2X0_CTRL_EN
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-#define L2X0_CTRL_EN 1
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-#endif
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-
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-#ifdef CONFIG_CACHE_L2X0
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-.macro l2_cache_resume, tmp1, tmp2, tmp3, phys_l2x0_saved_regs
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- W(adr) \tmp1, \phys_l2x0_saved_regs
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- ldr \tmp1, [\tmp1]
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- ldr \tmp2, [\tmp1, #L2X0_R_PHY_BASE]
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- ldr \tmp3, [\tmp2, #L2X0_CTRL]
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- tst \tmp3, #L2X0_CTRL_EN
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- bne exit_l2_resume
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- ldr \tmp3, [\tmp1, #L2X0_R_TAG_LATENCY]
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- str \tmp3, [\tmp2, #L310_TAG_LATENCY_CTRL]
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- ldr \tmp3, [\tmp1, #L2X0_R_DATA_LATENCY]
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- str \tmp3, [\tmp2, #L310_DATA_LATENCY_CTRL]
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- ldr \tmp3, [\tmp1, #L2X0_R_PREFETCH_CTRL]
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- str \tmp3, [\tmp2, #L310_PREFETCH_CTRL]
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- ldr \tmp3, [\tmp1, #L2X0_R_PWR_CTRL]
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- str \tmp3, [\tmp2, #L310_POWER_CTRL]
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- ldr \tmp3, [\tmp1, #L2X0_R_AUX_CTRL]
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- str \tmp3, [\tmp2, #L2X0_AUX_CTRL]
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- mov \tmp3, #L2X0_CTRL_EN
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- str \tmp3, [\tmp2, #L2X0_CTRL]
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-exit_l2_resume:
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-.endm
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-#else /* CONFIG_CACHE_L2X0 */
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-.macro l2_cache_resume, tmp1, tmp2, tmp3, phys_l2x0_saved_regs
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-.endm
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-#endif /* CONFIG_CACHE_L2X0 */
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#else
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void tegra_pen_lock(void);
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void tegra_pen_unlock(void);
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