|
@@ -132,12 +132,12 @@ BEGIN_FTR_SECTION
|
|
|
#endif
|
|
|
|
|
|
beq cr1,2f
|
|
|
- b .power7_wakeup_noloss
|
|
|
-2: b .power7_wakeup_loss
|
|
|
+ b power7_wakeup_noloss
|
|
|
+2: b power7_wakeup_loss
|
|
|
|
|
|
/* Fast Sleep wakeup on PowerNV */
|
|
|
8: GET_PACA(r13)
|
|
|
- b .power7_wakeup_tb_loss
|
|
|
+ b power7_wakeup_tb_loss
|
|
|
|
|
|
9:
|
|
|
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
|
|
@@ -211,7 +211,7 @@ data_access_slb_pSeries:
|
|
|
#endif /* __DISABLED__ */
|
|
|
mfspr r12,SPRN_SRR1
|
|
|
#ifndef CONFIG_RELOCATABLE
|
|
|
- b .slb_miss_realmode
|
|
|
+ b slb_miss_realmode
|
|
|
#else
|
|
|
/*
|
|
|
* We can't just use a direct branch to .slb_miss_realmode
|
|
@@ -243,7 +243,7 @@ instruction_access_slb_pSeries:
|
|
|
#endif /* __DISABLED__ */
|
|
|
mfspr r12,SPRN_SRR1
|
|
|
#ifndef CONFIG_RELOCATABLE
|
|
|
- b .slb_miss_realmode
|
|
|
+ b slb_miss_realmode
|
|
|
#else
|
|
|
mfctr r11
|
|
|
ld r10,PACAKBASE(r13)
|
|
@@ -829,7 +829,7 @@ data_access_slb_relon_pSeries:
|
|
|
mfspr r3,SPRN_DAR
|
|
|
mfspr r12,SPRN_SRR1
|
|
|
#ifndef CONFIG_RELOCATABLE
|
|
|
- b .slb_miss_realmode
|
|
|
+ b slb_miss_realmode
|
|
|
#else
|
|
|
/*
|
|
|
* We can't just use a direct branch to .slb_miss_realmode
|
|
@@ -854,7 +854,7 @@ instruction_access_slb_relon_pSeries:
|
|
|
mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
|
|
|
mfspr r12,SPRN_SRR1
|
|
|
#ifndef CONFIG_RELOCATABLE
|
|
|
- b .slb_miss_realmode
|
|
|
+ b slb_miss_realmode
|
|
|
#else
|
|
|
mfctr r11
|
|
|
ld r10,PACAKBASE(r13)
|
|
@@ -966,7 +966,7 @@ system_call_entry:
|
|
|
b system_call_common
|
|
|
|
|
|
ppc64_runlatch_on_trampoline:
|
|
|
- b .__ppc64_runlatch_on
|
|
|
+ b __ppc64_runlatch_on
|
|
|
|
|
|
/*
|
|
|
* Here we have detected that the kernel stack pointer is bad.
|
|
@@ -1025,7 +1025,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
|
|
|
std r12,RESULT(r1)
|
|
|
std r11,STACK_FRAME_OVERHEAD-16(r1)
|
|
|
1: addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .kernel_bad_stack
|
|
|
+ bl kernel_bad_stack
|
|
|
b 1b
|
|
|
|
|
|
/*
|
|
@@ -1046,7 +1046,7 @@ data_access_common:
|
|
|
ld r3,PACA_EXGEN+EX_DAR(r13)
|
|
|
lwz r4,PACA_EXGEN+EX_DSISR(r13)
|
|
|
li r5,0x300
|
|
|
- b .do_hash_page /* Try to handle as hpte fault */
|
|
|
+ b do_hash_page /* Try to handle as hpte fault */
|
|
|
|
|
|
.align 7
|
|
|
.globl h_data_storage_common
|
|
@@ -1056,11 +1056,11 @@ h_data_storage_common:
|
|
|
mfspr r10,SPRN_HDSISR
|
|
|
stw r10,PACA_EXGEN+EX_DSISR(r13)
|
|
|
EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .unknown_exception
|
|
|
- b .ret_from_except
|
|
|
+ bl unknown_exception
|
|
|
+ b ret_from_except
|
|
|
|
|
|
.align 7
|
|
|
.globl instruction_access_common
|
|
@@ -1071,7 +1071,7 @@ instruction_access_common:
|
|
|
ld r3,_NIP(r1)
|
|
|
andis. r4,r12,0x5820
|
|
|
li r5,0x400
|
|
|
- b .do_hash_page /* Try to handle as hpte fault */
|
|
|
+ b do_hash_page /* Try to handle as hpte fault */
|
|
|
|
|
|
STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
|
|
|
|
|
@@ -1088,7 +1088,7 @@ slb_miss_user_common:
|
|
|
stw r9,PACA_EXGEN+EX_CCR(r13)
|
|
|
std r10,PACA_EXGEN+EX_LR(r13)
|
|
|
std r11,PACA_EXGEN+EX_SRR0(r13)
|
|
|
- bl .slb_allocate_user
|
|
|
+ bl slb_allocate_user
|
|
|
|
|
|
ld r10,PACA_EXGEN+EX_LR(r13)
|
|
|
ld r3,PACA_EXGEN+EX_R3(r13)
|
|
@@ -1131,9 +1131,9 @@ slb_miss_fault:
|
|
|
unrecov_user_slb:
|
|
|
EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
|
|
|
DISABLE_INTS
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
1: addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .unrecoverable_exception
|
|
|
+ bl unrecoverable_exception
|
|
|
b 1b
|
|
|
|
|
|
#endif /* __DISABLED__ */
|
|
@@ -1158,10 +1158,10 @@ machine_check_common:
|
|
|
lwz r4,PACA_EXGEN+EX_DSISR(r13)
|
|
|
std r3,_DAR(r1)
|
|
|
std r4,_DSISR(r1)
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .machine_check_exception
|
|
|
- b .ret_from_except
|
|
|
+ bl machine_check_exception
|
|
|
+ b ret_from_except
|
|
|
|
|
|
.align 7
|
|
|
.globl alignment_common
|
|
@@ -1175,31 +1175,31 @@ alignment_common:
|
|
|
lwz r4,PACA_EXGEN+EX_DSISR(r13)
|
|
|
std r3,_DAR(r1)
|
|
|
std r4,_DSISR(r1)
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .alignment_exception
|
|
|
- b .ret_from_except
|
|
|
+ bl alignment_exception
|
|
|
+ b ret_from_except
|
|
|
|
|
|
.align 7
|
|
|
.globl program_check_common
|
|
|
program_check_common:
|
|
|
EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .program_check_exception
|
|
|
- b .ret_from_except
|
|
|
+ bl program_check_exception
|
|
|
+ b ret_from_except
|
|
|
|
|
|
.align 7
|
|
|
.globl fp_unavailable_common
|
|
|
fp_unavailable_common:
|
|
|
EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
|
|
|
bne 1f /* if from user, just load it up */
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .kernel_fp_unavailable_exception
|
|
|
+ bl kernel_fp_unavailable_exception
|
|
|
BUG_OPCODE
|
|
|
1:
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
@@ -1211,15 +1211,15 @@ BEGIN_FTR_SECTION
|
|
|
bne- 2f
|
|
|
END_FTR_SECTION_IFSET(CPU_FTR_TM)
|
|
|
#endif
|
|
|
- bl .load_up_fpu
|
|
|
+ bl load_up_fpu
|
|
|
b fast_exception_return
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
2: /* User process was in a transaction */
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .fp_unavailable_tm
|
|
|
- b .ret_from_except
|
|
|
+ bl fp_unavailable_tm
|
|
|
+ b ret_from_except
|
|
|
#endif
|
|
|
.align 7
|
|
|
.globl altivec_unavailable_common
|
|
@@ -1237,24 +1237,24 @@ BEGIN_FTR_SECTION
|
|
|
bne- 2f
|
|
|
END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
|
|
|
#endif
|
|
|
- bl .load_up_altivec
|
|
|
+ bl load_up_altivec
|
|
|
b fast_exception_return
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
2: /* User process was in a transaction */
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .altivec_unavailable_tm
|
|
|
- b .ret_from_except
|
|
|
+ bl altivec_unavailable_tm
|
|
|
+ b ret_from_except
|
|
|
#endif
|
|
|
1:
|
|
|
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
|
|
|
#endif
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .altivec_unavailable_exception
|
|
|
- b .ret_from_except
|
|
|
+ bl altivec_unavailable_exception
|
|
|
+ b ret_from_except
|
|
|
|
|
|
.align 7
|
|
|
.globl vsx_unavailable_common
|
|
@@ -1272,23 +1272,23 @@ BEGIN_FTR_SECTION
|
|
|
bne- 2f
|
|
|
END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
|
|
|
#endif
|
|
|
- b .load_up_vsx
|
|
|
+ b load_up_vsx
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
2: /* User process was in a transaction */
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .vsx_unavailable_tm
|
|
|
- b .ret_from_except
|
|
|
+ bl vsx_unavailable_tm
|
|
|
+ b ret_from_except
|
|
|
#endif
|
|
|
1:
|
|
|
END_FTR_SECTION_IFSET(CPU_FTR_VSX)
|
|
|
#endif
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
DISABLE_INTS
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .vsx_unavailable_exception
|
|
|
- b .ret_from_except
|
|
|
+ bl vsx_unavailable_exception
|
|
|
+ b ret_from_except
|
|
|
|
|
|
STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception)
|
|
|
STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception)
|
|
@@ -1386,9 +1386,9 @@ _GLOBAL(opal_mc_secondary_handler)
|
|
|
machine_check_handle_early:
|
|
|
std r0,GPR0(r1) /* Save r0 */
|
|
|
EXCEPTION_PROLOG_COMMON_3(0x200)
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .machine_check_early
|
|
|
+ bl machine_check_early
|
|
|
ld r12,_MSR(r1)
|
|
|
#ifdef CONFIG_PPC_P7_NAP
|
|
|
/*
|
|
@@ -1408,11 +1408,11 @@ machine_check_handle_early:
|
|
|
/* Supervisor state loss */
|
|
|
li r0,1
|
|
|
stb r0,PACA_NAPSTATELOST(r13)
|
|
|
-3: bl .machine_check_queue_event
|
|
|
+3: bl machine_check_queue_event
|
|
|
MACHINE_CHECK_HANDLER_WINDUP
|
|
|
GET_PACA(r13)
|
|
|
ld r1,PACAR1(r13)
|
|
|
- b .power7_enter_nap_mode
|
|
|
+ b power7_enter_nap_mode
|
|
|
4:
|
|
|
#endif
|
|
|
/*
|
|
@@ -1444,7 +1444,7 @@ machine_check_handle_early:
|
|
|
andi. r11,r12,MSR_RI
|
|
|
bne 2f
|
|
|
1: addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .unrecoverable_exception
|
|
|
+ bl unrecoverable_exception
|
|
|
b 1b
|
|
|
2:
|
|
|
/*
|
|
@@ -1452,7 +1452,7 @@ machine_check_handle_early:
|
|
|
* Queue up the MCE event so that we can log it later, while
|
|
|
* returning from kernel or opal call.
|
|
|
*/
|
|
|
- bl .machine_check_queue_event
|
|
|
+ bl machine_check_queue_event
|
|
|
MACHINE_CHECK_HANDLER_WINDUP
|
|
|
rfid
|
|
|
9:
|
|
@@ -1477,7 +1477,7 @@ _GLOBAL(slb_miss_realmode)
|
|
|
stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
|
|
|
std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
|
|
|
|
|
|
- bl .slb_allocate_realmode
|
|
|
+ bl slb_allocate_realmode
|
|
|
|
|
|
/* All done -- return from exception. */
|
|
|
|
|
@@ -1517,9 +1517,9 @@ _GLOBAL(slb_miss_realmode)
|
|
|
unrecov_slb:
|
|
|
EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
|
|
|
DISABLE_INTS
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
1: addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .unrecoverable_exception
|
|
|
+ bl unrecoverable_exception
|
|
|
b 1b
|
|
|
|
|
|
|
|
@@ -1573,7 +1573,7 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
|
|
|
*
|
|
|
* at return r3 = 0 for success, 1 for page fault, negative for error
|
|
|
*/
|
|
|
- bl .hash_page /* build HPTE if possible */
|
|
|
+ bl hash_page /* build HPTE if possible */
|
|
|
cmpdi r3,0 /* see if hash_page succeeded */
|
|
|
|
|
|
/* Success */
|
|
@@ -1587,35 +1587,35 @@ handle_page_fault:
|
|
|
11: ld r4,_DAR(r1)
|
|
|
ld r5,_DSISR(r1)
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .do_page_fault
|
|
|
+ bl do_page_fault
|
|
|
cmpdi r3,0
|
|
|
beq+ 12f
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
mr r5,r3
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
lwz r4,_DAR(r1)
|
|
|
- bl .bad_page_fault
|
|
|
- b .ret_from_except
|
|
|
+ bl bad_page_fault
|
|
|
+ b ret_from_except
|
|
|
|
|
|
/* We have a data breakpoint exception - handle it */
|
|
|
handle_dabr_fault:
|
|
|
- bl .save_nvgprs
|
|
|
+ bl save_nvgprs
|
|
|
ld r4,_DAR(r1)
|
|
|
ld r5,_DSISR(r1)
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
- bl .do_break
|
|
|
-12: b .ret_from_except_lite
|
|
|
+ bl do_break
|
|
|
+12: b ret_from_except_lite
|
|
|
|
|
|
|
|
|
/* We have a page fault that hash_page could handle but HV refused
|
|
|
* the PTE insertion
|
|
|
*/
|
|
|
-13: bl .save_nvgprs
|
|
|
+13: bl save_nvgprs
|
|
|
mr r5,r3
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
ld r4,_DAR(r1)
|
|
|
- bl .low_hash_fault
|
|
|
- b .ret_from_except
|
|
|
+ bl low_hash_fault
|
|
|
+ b ret_from_except
|
|
|
|
|
|
/*
|
|
|
* We come here as a result of a DSI at a point where we don't want
|
|
@@ -1624,16 +1624,16 @@ handle_dabr_fault:
|
|
|
* were soft-disabled. We want to invoke the exception handler for
|
|
|
* the access, or panic if there isn't a handler.
|
|
|
*/
|
|
|
-77: bl .save_nvgprs
|
|
|
+77: bl save_nvgprs
|
|
|
mr r4,r3
|
|
|
addi r3,r1,STACK_FRAME_OVERHEAD
|
|
|
li r5,SIGSEGV
|
|
|
- bl .bad_page_fault
|
|
|
- b .ret_from_except
|
|
|
+ bl bad_page_fault
|
|
|
+ b ret_from_except
|
|
|
|
|
|
/* here we have a segment miss */
|
|
|
do_ste_alloc:
|
|
|
- bl .ste_allocate /* try to insert stab entry */
|
|
|
+ bl ste_allocate /* try to insert stab entry */
|
|
|
cmpdi r3,0
|
|
|
bne- handle_page_fault
|
|
|
b fast_exception_return
|