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@@ -17,6 +17,7 @@
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/acpi.h>
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+#include <linux/clk.h>
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#include <sound/jack.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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@@ -1547,19 +1548,19 @@ static const int lrclk_rates[] = {
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};
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static const int user_pclk_rates[] = {
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- 13000000, 13000000
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+ 13000000, 13000000, 19200000, 19200000,
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};
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static const int user_lrclk_rates[] = {
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- 44100, 48000
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+ 44100, 48000, 44100, 48000,
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};
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static const unsigned long long ni_value[] = {
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- 3528, 768
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+ 3528, 768, 441, 8
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};
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static const unsigned long long mi_value[] = {
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- 8125, 1625
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+ 8125, 1625, 1500, 25
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};
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static void max98090_configure_bclk(struct snd_soc_codec *codec)
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@@ -1800,6 +1801,19 @@ static int max98090_set_bias_level(struct snd_soc_codec *codec,
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break;
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case SND_SOC_BIAS_PREPARE:
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+ /*
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+ * SND_SOC_BIAS_PREPARE is called while preparing for a
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+ * transition to ON or away from ON. If current bias_level
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+ * is SND_SOC_BIAS_ON, then it is preparing for a transition
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+ * away from ON. Disable the clock in that case, otherwise
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+ * enable it.
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+ */
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+ if (!IS_ERR(max98090->mclk)) {
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+ if (codec->dapm.bias_level == SND_SOC_BIAS_ON)
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+ clk_disable_unprepare(max98090->mclk);
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+ else
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+ clk_prepare_enable(max98090->mclk);
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+ }
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break;
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case SND_SOC_BIAS_STANDBY:
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@@ -1929,6 +1943,11 @@ static int max98090_dai_set_sysclk(struct snd_soc_dai *dai,
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if (freq == max98090->sysclk)
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return 0;
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+ if (!IS_ERR(max98090->mclk)) {
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+ freq = clk_round_rate(max98090->mclk, freq);
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+ clk_set_rate(max98090->mclk, freq);
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+ }
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+
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/* Setup clocks for slave mode, and using the PLL
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* PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
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* 0x02 (when master clk is 20MHz to 40MHz)..
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@@ -2213,6 +2232,10 @@ static int max98090_probe(struct snd_soc_codec *codec)
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dev_dbg(codec->dev, "max98090_probe\n");
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+ max98090->mclk = devm_clk_get(codec->dev, "mclk");
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+ if (PTR_ERR(max98090->mclk) == -EPROBE_DEFER)
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+ return -EPROBE_DEFER;
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+
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max98090->codec = codec;
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/* Reset the codec, the DSP core, and disable all interrupts */
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