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@@ -58,7 +58,6 @@
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#define FIMC_SHFACTOR 10
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#define FIMC_BUF_STOP 1
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#define FIMC_BUF_START 2
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-#define FIMC_REG_SZ 32
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#define FIMC_WIDTH_ITU_709 1280
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#define FIMC_REFRESH_MAX 60
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#define FIMC_REFRESH_MIN 12
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@@ -1123,16 +1122,13 @@ static int fimc_dst_set_size(struct device *dev, int swap,
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return 0;
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}
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-static int fimc_dst_get_buf_seq(struct fimc_context *ctx)
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+static int fimc_dst_get_buf_count(struct fimc_context *ctx)
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{
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- u32 cfg, i, buf_num = 0;
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- u32 mask = 0x00000001;
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+ u32 cfg, buf_num;
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cfg = fimc_read(ctx, EXYNOS_CIFCNTSEQ);
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- for (i = 0; i < FIMC_REG_SZ; i++)
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- if (cfg & (mask << i))
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- buf_num++;
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+ buf_num = hweight32(cfg);
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DRM_DEBUG_KMS("buf_num[%d]\n", buf_num);
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@@ -1176,12 +1172,12 @@ static int fimc_dst_set_buf_seq(struct fimc_context *ctx, u32 buf_id,
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/* interrupt enable */
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if (buf_type == IPP_BUF_ENQUEUE &&
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- fimc_dst_get_buf_seq(ctx) >= FIMC_BUF_START)
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+ fimc_dst_get_buf_count(ctx) >= FIMC_BUF_START)
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fimc_mask_irq(ctx, true);
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/* interrupt disable */
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if (buf_type == IPP_BUF_DEQUEUE &&
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- fimc_dst_get_buf_seq(ctx) <= FIMC_BUF_STOP)
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+ fimc_dst_get_buf_count(ctx) <= FIMC_BUF_STOP)
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fimc_mask_irq(ctx, false);
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err_unlock:
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