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@@ -3526,6 +3526,9 @@ static void mlx5e_build_nic_netdev_priv(struct mlx5_core_dev *mdev,
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cqe_compress_heuristic(link_speed, pci_bw);
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cqe_compress_heuristic(link_speed, pci_bw);
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}
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}
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+ MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_COMPRESS,
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+ priv->params.rx_cqe_compress_def);
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+
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mlx5e_set_rq_priv_params(priv);
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mlx5e_set_rq_priv_params(priv);
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if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
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if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
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priv->params.lro_en = true;
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priv->params.lro_en = true;
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@@ -3555,7 +3558,6 @@ static void mlx5e_build_nic_netdev_priv(struct mlx5_core_dev *mdev,
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/* Initialize pflags */
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/* Initialize pflags */
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MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_BASED_MODER,
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MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_BASED_MODER,
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priv->params.rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE);
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priv->params.rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE);
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- MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_COMPRESS, priv->params.rx_cqe_compress_def);
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mutex_init(&priv->state_lock);
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mutex_init(&priv->state_lock);
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