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@@ -2421,26 +2421,23 @@ void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu)
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{
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struct intel_gvt *gvt = vgpu->gvt;
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struct drm_i915_private *dev_priv = gvt->dev_priv;
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- struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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+ struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;
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+ struct intel_gvt_gtt_entry entry = {.type = GTT_TYPE_GGTT_PTE};
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u32 index;
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- u32 offset;
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u32 num_entries;
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- struct intel_gvt_gtt_entry e;
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- memset(&e, 0, sizeof(struct intel_gvt_gtt_entry));
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- e.type = GTT_TYPE_GGTT_PTE;
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- ops->set_pfn(&e, gvt->gtt.scratch_mfn);
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- e.val64 |= _PAGE_PRESENT;
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+ pte_ops->set_pfn(&entry, gvt->gtt.scratch_mfn);
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+ pte_ops->set_present(&entry);
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index = vgpu_aperture_gmadr_base(vgpu) >> PAGE_SHIFT;
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num_entries = vgpu_aperture_sz(vgpu) >> PAGE_SHIFT;
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- for (offset = 0; offset < num_entries; offset++)
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- ops->set_entry(NULL, &e, index + offset, false, 0, vgpu);
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+ while (num_entries--)
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+ ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++);
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index = vgpu_hidden_gmadr_base(vgpu) >> PAGE_SHIFT;
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num_entries = vgpu_hidden_sz(vgpu) >> PAGE_SHIFT;
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- for (offset = 0; offset < num_entries; offset++)
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- ops->set_entry(NULL, &e, index + offset, false, 0, vgpu);
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+ while (num_entries--)
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+ ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++);
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gtt_invalidate(dev_priv);
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}
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