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powerpc/thp: Add write barrier after updating the valid bit

With hugepages, we store the hpte valid information in the pte page
whose address is stored in the second half of the PMD. Use a
write barrier to make sure clearing pmd busy bit and updating
hpte valid info are ordered properly.

CC: <stable@vger.kernel.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Aneesh Kumar K.V 11 年之前
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b0aa44a3df
共有 1 個文件被更改,包括 4 次插入1 次删除
  1. 4 1
      arch/powerpc/mm/hugepage-hash64.c

+ 4 - 1
arch/powerpc/mm/hugepage-hash64.c

@@ -172,8 +172,11 @@ repeat:
 		mark_hpte_slot_valid(hpte_slot_array, index, slot);
 		mark_hpte_slot_valid(hpte_slot_array, index, slot);
 	}
 	}
 	/*
 	/*
-	 * No need to use ldarx/stdcx here
+	 * The hpte valid is stored in the pgtable whose address is in the
+	 * second half of the PMD. Order this against clearing of the busy bit in
+	 * huge pmd.
 	 */
 	 */
+	smp_wmb();
 	*pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
 	*pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
 	return 0;
 	return 0;
 }
 }