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@@ -284,12 +284,14 @@
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#define DWC3_DGCMD_SET_ENDPOINT_NRDY 0x0c
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#define DWC3_DGCMD_SET_ENDPOINT_NRDY 0x0c
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#define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK 0x10
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#define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK 0x10
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+#define DWC3_DGCMD_STATUS(n) (((n) >> 15) & 1)
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+#define DWC3_DGCMD_CMDACT (1 << 10)
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+
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/* Device Endpoint Command Register */
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/* Device Endpoint Command Register */
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#define DWC3_DEPCMD_PARAM_SHIFT 16
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#define DWC3_DEPCMD_PARAM_SHIFT 16
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#define DWC3_DEPCMD_PARAM(x) ((x) << DWC3_DEPCMD_PARAM_SHIFT)
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#define DWC3_DEPCMD_PARAM(x) ((x) << DWC3_DEPCMD_PARAM_SHIFT)
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#define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
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#define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
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-#define DWC3_DEPCMD_STATUS_MASK (0x0f << 12)
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-#define DWC3_DEPCMD_STATUS(x) (((x) & DWC3_DEPCMD_STATUS_MASK) >> 12)
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+#define DWC3_DEPCMD_STATUS(x) (((x) >> 15) & 1)
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#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
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#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
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#define DWC3_DEPCMD_CMDACT (1 << 10)
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#define DWC3_DEPCMD_CMDACT (1 << 10)
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#define DWC3_DEPCMD_CMDIOC (1 << 8)
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#define DWC3_DEPCMD_CMDIOC (1 << 8)
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