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@@ -221,28 +221,6 @@ static int mv88e6171_setup_port(struct dsa_switch *ds, int p)
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val |= 0x000c;
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val |= 0x000c;
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REG_WRITE(addr, 0x04, val);
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REG_WRITE(addr, 0x04, val);
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- /* Port Control 1: disable trunking. Also, if this is the
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- * CPU port, enable learn messages to be sent to this port.
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- */
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- REG_WRITE(addr, 0x05, dsa_is_cpu_port(ds, p) ? 0x8000 : 0x0000);
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-
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- /* Port based VLAN map: give each port its own address
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- * database, allow the CPU port to talk to each of the 'real'
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- * ports, and allow each of the 'real' ports to only talk to
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- * the upstream port.
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- */
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- val = (p & 0xf) << 12;
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- if (dsa_is_cpu_port(ds, p))
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- val |= ds->phys_port_mask;
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- else
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- val |= 1 << dsa_upstream_port(ds);
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- REG_WRITE(addr, 0x06, val);
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-
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- /* Default VLAN ID and priority: don't set a default VLAN
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- * ID, and set the default packet priority to zero.
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- */
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- REG_WRITE(addr, 0x07, 0x0000);
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-
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/* Port Control 2: don't force a good FCS, set the maximum
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/* Port Control 2: don't force a good FCS, set the maximum
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* frame size to 10240 bytes, don't let the switch add or
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* frame size to 10240 bytes, don't let the switch add or
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* strip 802.1q tags, don't discard tagged or untagged frames
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* strip 802.1q tags, don't discard tagged or untagged frames
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@@ -287,7 +265,7 @@ static int mv88e6171_setup_port(struct dsa_switch *ds, int p)
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*/
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*/
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REG_WRITE(addr, 0x19, 0x7654);
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REG_WRITE(addr, 0x19, 0x7654);
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- return 0;
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+ return mv88e6xxx_setup_port_common(ds, p);
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}
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}
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static int mv88e6171_setup(struct dsa_switch *ds)
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static int mv88e6171_setup(struct dsa_switch *ds)
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