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@@ -676,6 +676,7 @@ enum mvpp2_tag_type {
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#define MVPP2_PRS_RI_L3_MCAST BIT(15)
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#define MVPP2_PRS_RI_L3_BCAST (BIT(15) | BIT(16))
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#define MVPP2_PRS_RI_IP_FRAG_MASK 0x20000
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+#define MVPP2_PRS_RI_IP_FRAG_TRUE BIT(17)
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#define MVPP2_PRS_RI_UDF3_MASK 0x300000
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#define MVPP2_PRS_RI_UDF3_RX_SPECIAL BIT(21)
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#define MVPP2_PRS_RI_L4_PROTO_MASK 0x1c00000
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@@ -2315,7 +2316,7 @@ static int mvpp2_prs_ip4_proto(struct mvpp2 *priv, unsigned short proto,
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(proto != IPPROTO_IGMP))
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return -EINVAL;
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- /* Fragmented packet */
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+ /* Not fragmented packet */
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tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,
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MVPP2_PE_LAST_FREE_TID);
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if (tid < 0)
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@@ -2334,8 +2335,12 @@ static int mvpp2_prs_ip4_proto(struct mvpp2 *priv, unsigned short proto,
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MVPP2_PRS_SRAM_OP_SEL_UDF_ADD);
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mvpp2_prs_sram_ai_update(&pe, MVPP2_PRS_IPV4_DIP_AI_BIT,
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MVPP2_PRS_IPV4_DIP_AI_BIT);
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- mvpp2_prs_sram_ri_update(&pe, ri | MVPP2_PRS_RI_IP_FRAG_MASK,
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- ri_mask | MVPP2_PRS_RI_IP_FRAG_MASK);
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+ mvpp2_prs_sram_ri_update(&pe, ri, ri_mask | MVPP2_PRS_RI_IP_FRAG_MASK);
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+
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+ mvpp2_prs_tcam_data_byte_set(&pe, 2, 0x00,
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+ MVPP2_PRS_TCAM_PROTO_MASK_L);
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+ mvpp2_prs_tcam_data_byte_set(&pe, 3, 0x00,
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+ MVPP2_PRS_TCAM_PROTO_MASK);
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mvpp2_prs_tcam_data_byte_set(&pe, 5, proto, MVPP2_PRS_TCAM_PROTO_MASK);
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mvpp2_prs_tcam_ai_update(&pe, 0, MVPP2_PRS_IPV4_DIP_AI_BIT);
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@@ -2346,7 +2351,7 @@ static int mvpp2_prs_ip4_proto(struct mvpp2 *priv, unsigned short proto,
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mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_IP4);
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mvpp2_prs_hw_write(priv, &pe);
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- /* Not fragmented packet */
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+ /* Fragmented packet */
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tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,
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MVPP2_PE_LAST_FREE_TID);
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if (tid < 0)
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@@ -2358,8 +2363,11 @@ static int mvpp2_prs_ip4_proto(struct mvpp2 *priv, unsigned short proto,
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pe.sram.word[MVPP2_PRS_SRAM_RI_CTRL_WORD] = 0x0;
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mvpp2_prs_sram_ri_update(&pe, ri, ri_mask);
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- mvpp2_prs_tcam_data_byte_set(&pe, 2, 0x00, MVPP2_PRS_TCAM_PROTO_MASK_L);
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- mvpp2_prs_tcam_data_byte_set(&pe, 3, 0x00, MVPP2_PRS_TCAM_PROTO_MASK);
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+ mvpp2_prs_sram_ri_update(&pe, ri | MVPP2_PRS_RI_IP_FRAG_TRUE,
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+ ri_mask | MVPP2_PRS_RI_IP_FRAG_MASK);
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+
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+ mvpp2_prs_tcam_data_byte_set(&pe, 2, 0x00, 0x0);
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+ mvpp2_prs_tcam_data_byte_set(&pe, 3, 0x00, 0x0);
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/* Update shadow table and hw entry */
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mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_IP4);
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