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@@ -375,14 +375,19 @@ enum ath10k_hw_4addr_pad {
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#define TARGET_10X_MAC_AGGR_DELIM 0
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#define TARGET_10X_AST_SKID_LIMIT 128
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#define TARGET_10X_NUM_STATIONS 128
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+#define TARGET_10X_TX_STATS_NUM_STATIONS 118
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#define TARGET_10X_NUM_PEERS ((TARGET_10X_NUM_STATIONS) + \
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(TARGET_10X_NUM_VDEVS))
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+#define TARGET_10X_TX_STATS_NUM_PEERS ((TARGET_10X_TX_STATS_NUM_STATIONS) + \
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+ (TARGET_10X_NUM_VDEVS))
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#define TARGET_10X_NUM_OFFLOAD_PEERS 0
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#define TARGET_10X_NUM_OFFLOAD_REORDER_BUFS 0
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#define TARGET_10X_NUM_PEER_KEYS 2
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#define TARGET_10X_NUM_TIDS_MAX 256
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#define TARGET_10X_NUM_TIDS min((TARGET_10X_NUM_TIDS_MAX), \
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(TARGET_10X_NUM_PEERS) * 2)
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+#define TARGET_10X_TX_STATS_NUM_TIDS min((TARGET_10X_NUM_TIDS_MAX), \
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+ (TARGET_10X_TX_STATS_NUM_PEERS) * 2)
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#define TARGET_10X_TX_CHAIN_MASK (BIT(0) | BIT(1) | BIT(2))
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#define TARGET_10X_RX_CHAIN_MASK (BIT(0) | BIT(1) | BIT(2))
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#define TARGET_10X_RX_TIMEOUT_LO_PRI 100
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