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@@ -482,13 +482,3 @@ void intel_csr_ucode_fini(struct drm_device *dev)
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intel_csr_load_status_set(dev_priv, FW_FAILED);
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kfree(dev_priv->csr.dmc_payload);
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}
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-
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-void assert_csr_loaded(struct drm_i915_private *dev_priv)
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-{
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- WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED,
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- "CSR is not loaded.\n");
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- WARN_ONCE(!I915_READ(CSR_PROGRAM(0)),
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- "CSR program storage start is NULL\n");
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- WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
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- WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
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-}
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