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@@ -101,30 +101,12 @@ extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
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extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
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uint16_t msg, uint32_t parameter);
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-extern int smum_wait_on_register(struct pp_hwmgr *hwmgr,
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- uint32_t index, uint32_t value, uint32_t mask);
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-
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-extern int smum_wait_for_register_unequal(struct pp_hwmgr *hwmgr,
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- uint32_t index, uint32_t value, uint32_t mask);
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-
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-extern int smum_wait_on_indirect_register(struct pp_hwmgr *hwmgr,
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- uint32_t indirect_port, uint32_t index,
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- uint32_t value, uint32_t mask);
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-
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-
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-extern void smum_wait_for_indirect_register_unequal(
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- struct pp_hwmgr *hwmgr,
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- uint32_t indirect_port, uint32_t index,
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- uint32_t value, uint32_t mask);
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-
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-
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extern int smu_allocate_memory(void *device, uint32_t size,
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enum cgs_gpu_mem_type type,
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uint32_t byte_align, uint64_t *mc_addr,
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void **kptr, void *handle);
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extern int smu_free_memory(void *device, void *handle);
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-extern int vega10_smum_init(struct pp_hwmgr *hwmgr);
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extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
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@@ -147,19 +129,5 @@ extern int smum_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr,
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extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
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-#define SMUM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
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-
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-#define SMUM_FIELD_MASK(reg, field) reg##__##field##_MASK
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-
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-
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-#define SMUM_GET_FIELD(value, reg, field) \
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- (((value) & SMUM_FIELD_MASK(reg, field)) \
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- >> SMUM_FIELD_SHIFT(reg, field))
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-
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-
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-#define SMUM_READ_INDIRECT_FIELD(device, port, reg, field) \
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- SMUM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
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- reg, field)
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-
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#endif
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