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@@ -4,6 +4,7 @@ Required properties:
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- compatible: Should be one of the following:
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* "qcom,ath10k"
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* "qcom,ipq4019-wifi"
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+ * "qcom,wcn3990-wifi"
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PCI based devices uses compatible string "qcom,ath10k" and takes calibration
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data along with board specific data via "qcom,ath10k-calibration-data".
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@@ -18,8 +19,12 @@ In general, entry "qcom,ath10k-pre-calibration-data" and
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"qcom,ath10k-calibration-data" conflict with each other and only one
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can be provided per device.
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+SNOC based devices (i.e. wcn3990) uses compatible string "qcom,wcn3990-wifi".
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+
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Optional properties:
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- reg: Address and length of the register set for the device.
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+- reg-names: Must include the list of following reg names,
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+ "membase"
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reseti.txt for details.
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- reset-names: Must include the list of following reset names,
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@@ -49,6 +54,8 @@ Optional properties:
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hw versions.
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- qcom,ath10k-pre-calibration-data : pre calibration data as an array,
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the length can vary between hw versions.
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+- <supply-name>-supply: handle to the regulator device tree node
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+ optional "supply-name" is "vdd-0.8-cx-mx".
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Example (to supply the calibration data alone):
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@@ -119,3 +126,27 @@ wifi0: wifi@a000000 {
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qcom,msi_base = <0x40>;
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qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
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};
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+
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+Example (to supply wcn3990 SoC wifi block details):
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+
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+wifi@18000000 {
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+ compatible = "qcom,wcn3990-wifi";
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+ reg = <0x18800000 0x800000>;
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+ reg-names = "membase";
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+ clocks = <&clock_gcc clk_aggre2_noc_clk>;
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+ clock-names = "smmu_aggre2_noc_clk"
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+ interrupts =
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+ <0 130 0 /* CE0 */ >,
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+ <0 131 0 /* CE1 */ >,
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+ <0 132 0 /* CE2 */ >,
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+ <0 133 0 /* CE3 */ >,
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+ <0 134 0 /* CE4 */ >,
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+ <0 135 0 /* CE5 */ >,
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+ <0 136 0 /* CE6 */ >,
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+ <0 137 0 /* CE7 */ >,
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+ <0 138 0 /* CE8 */ >,
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+ <0 139 0 /* CE9 */ >,
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+ <0 140 0 /* CE10 */ >,
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+ <0 141 0 /* CE11 */ >;
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+ vdd-0.8-cx-mx-supply = <&pm8998_l5>;
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+};
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