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@@ -2551,29 +2551,8 @@ static int gfx_v7_0_cp_gfx_start(struct amdgpu_device *adev)
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amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
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amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);
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- switch (adev->asic_type) {
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- case CHIP_BONAIRE:
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- amdgpu_ring_write(ring, 0x16000012);
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- amdgpu_ring_write(ring, 0x00000000);
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- break;
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- case CHIP_KAVERI:
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- amdgpu_ring_write(ring, 0x00000000); /* XXX */
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- amdgpu_ring_write(ring, 0x00000000);
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- break;
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- case CHIP_KABINI:
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- case CHIP_MULLINS:
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- amdgpu_ring_write(ring, 0x00000000); /* XXX */
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- amdgpu_ring_write(ring, 0x00000000);
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- break;
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- case CHIP_HAWAII:
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- amdgpu_ring_write(ring, 0x3a00161a);
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- amdgpu_ring_write(ring, 0x0000002e);
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- break;
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- default:
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- amdgpu_ring_write(ring, 0x00000000);
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- amdgpu_ring_write(ring, 0x00000000);
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- break;
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- }
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+ amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config);
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+ amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config_1);
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amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));
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amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);
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