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@@ -350,20 +350,9 @@ void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset)
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struct drm_device *dev = encoder->dev;
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struct radeon_device *rdev = dev->dev_private;
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- WREG32(HDMI_INFOFRAME_CONTROL0 + offset,
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- HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */
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- HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */
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-
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WREG32(AFMT_INFOFRAME_CONTROL0 + offset,
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AFMT_AUDIO_INFO_UPDATE); /* required for audio info values to be updated */
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- WREG32(HDMI_INFOFRAME_CONTROL1 + offset,
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- HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */
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-
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- WREG32(HDMI_AUDIO_PACKET_CONTROL + offset,
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- HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */
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- HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */
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-
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WREG32(AFMT_60958_0 + offset,
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AFMT_60958_CS_CHANNEL_NUMBER_L(1));
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@@ -408,15 +397,19 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
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if (!dig || !dig->afmt)
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return;
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- /* Silent, r600_hdmi_enable will raise WARN for us */
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- if (enable && dig->afmt->enabled)
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- return;
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- if (!enable && !dig->afmt->enabled)
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- return;
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+ if (enable) {
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+ WREG32(HDMI_INFOFRAME_CONTROL1 + dig->afmt->offset,
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+ HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */
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- if (!enable && dig->afmt->pin) {
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- radeon_audio_enable(rdev, dig->afmt->pin, 0);
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- dig->afmt->pin = NULL;
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+ WREG32(HDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset,
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+ HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */
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+ HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */
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+
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+ WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,
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+ HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */
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+ HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */
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+ } else {
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+ WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0);
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}
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dig->afmt->enabled = enable;
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@@ -425,33 +418,28 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
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enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);
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}
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-void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable)
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+void evergreen_dp_enable(struct drm_encoder *encoder, bool enable)
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{
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struct drm_device *dev = encoder->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
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- uint32_t offset;
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if (!dig || !dig->afmt)
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return;
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- offset = dig->afmt->offset;
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-
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if (enable) {
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struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
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struct radeon_connector *radeon_connector = to_radeon_connector(connector);
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struct radeon_connector_atom_dig *dig_connector;
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uint32_t val;
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- if (dig->afmt->enabled)
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- return;
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-
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- WREG32(EVERGREEN_DP_SEC_TIMESTAMP + offset, EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));
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+ WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,
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+ EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));
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if (radeon_connector->con_priv) {
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dig_connector = radeon_connector->con_priv;
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- val = RREG32(EVERGREEN_DP_SEC_AUD_N + offset);
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+ val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset);
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val &= ~EVERGREEN_DP_SEC_N_BASE_MULTIPLE(0xf);
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if (dig_connector->dp_clock == 162000)
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@@ -459,21 +447,16 @@ void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable)
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else
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val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(5);
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- WREG32(EVERGREEN_DP_SEC_AUD_N + offset, val);
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+ WREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset, val);
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}
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- WREG32(EVERGREEN_DP_SEC_CNTL + offset,
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+ WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,
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EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */
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EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */
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EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */
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EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */
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- radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
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} else {
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- if (!dig->afmt->enabled)
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- return;
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-
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- WREG32(EVERGREEN_DP_SEC_CNTL + offset, 0);
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- radeon_audio_enable(rdev, dig->afmt->pin, 0);
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+ WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);
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}
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dig->afmt->enabled = enable;
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