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@@ -1,28 +1,25 @@
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-Qualcomm adreno/snapdragon display controller
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+Qualcomm adreno/snapdragon MDP4 display controller
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+
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+Description:
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+
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+This is the bindings documentation for the MDP4 display controller found in
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+SoCs like MSM8960, APQ8064 and MSM8660.
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Required properties:
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- compatible:
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* "qcom,mdp4" - mdp4
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- * "qcom,mdp5" - mdp5
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- reg: Physical base address and length of the controller's registers.
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- interrupts: The interrupt signal from the display controller.
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- connectors: array of phandles for output device(s)
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- clocks: device clocks
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See ../clocks/clock-bindings.txt for details.
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- clock-names: the following clocks are required.
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- For MDP4:
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- * "core_clk"
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- * "iface_clk"
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- * "bus_clk"
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- * "lut_clk"
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- * "hdmi_clk"
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- * "tv_clk"
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- For MDP5:
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- * "bus_clk"
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- * "iface_clk"
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- * "core_clk"
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- * "lut_clk" (some MDP5 versions may not need this)
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- * "vsync_clk"
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+ * "core_clk"
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+ * "iface_clk"
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+ * "bus_clk"
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+ * "lut_clk"
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+ * "hdmi_clk"
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+ * "tv_clk"
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Optional properties:
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- gpus: phandle for gpu device
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