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@@ -5082,10 +5082,14 @@ void hsw_disable_ips(const struct intel_crtc_state *crtc_state)
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mutex_lock(&dev_priv->pcu_lock);
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WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
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mutex_unlock(&dev_priv->pcu_lock);
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- /* wait for pcode to finish disabling IPS, which may take up to 42ms */
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+ /*
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+ * Wait for PCODE to finish disabling IPS. The BSpec specified
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+ * 42ms timeout value leads to occasional timeouts so use 100ms
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+ * instead.
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+ */
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if (intel_wait_for_register(dev_priv,
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IPS_CTL, IPS_ENABLE, 0,
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- 42))
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+ 100))
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DRM_ERROR("Timed out waiting for IPS disable\n");
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} else {
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I915_WRITE(IPS_CTL, 0);
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