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@@ -70,9 +70,12 @@
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/*
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* Time to wait for conversion result to be ready. The device datasheet
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- * worst-case max value is 880ms. Add some slack to be on the safe side.
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+ * sect. 6.5 states results are ready after total integration time plus 3ms.
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+ * This results in worst-case max values of 113ms or 883ms, respectively.
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+ * Add some slack to be on the safe side.
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*/
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-#define OPT3001_RESULT_READY_TIMEOUT msecs_to_jiffies(1000)
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+#define OPT3001_RESULT_READY_SHORT 150
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+#define OPT3001_RESULT_READY_LONG 1000
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struct opt3001 {
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struct i2c_client *client;
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@@ -92,6 +95,8 @@ struct opt3001 {
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u8 high_thresh_exp;
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u8 low_thresh_exp;
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+
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+ bool use_irq;
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};
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struct opt3001_scale {
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@@ -230,26 +235,30 @@ static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
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u16 reg;
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u8 exponent;
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u16 value;
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+ long timeout;
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- /*
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- * Enable the end-of-conversion interrupt mechanism. Note that doing
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- * so will overwrite the low-level limit value however we will restore
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- * this value later on.
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- */
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- ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_LOW_LIMIT,
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- OPT3001_LOW_LIMIT_EOC_ENABLE);
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- if (ret < 0) {
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- dev_err(opt->dev, "failed to write register %02x\n",
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- OPT3001_LOW_LIMIT);
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- return ret;
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+ if (opt->use_irq) {
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+ /*
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+ * Enable the end-of-conversion interrupt mechanism. Note that
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+ * doing so will overwrite the low-level limit value however we
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+ * will restore this value later on.
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+ */
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+ ret = i2c_smbus_write_word_swapped(opt->client,
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+ OPT3001_LOW_LIMIT,
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+ OPT3001_LOW_LIMIT_EOC_ENABLE);
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+ if (ret < 0) {
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+ dev_err(opt->dev, "failed to write register %02x\n",
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+ OPT3001_LOW_LIMIT);
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+ return ret;
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+ }
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+
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+ /* Allow IRQ to access the device despite lock being set */
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+ opt->ok_to_ignore_lock = true;
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}
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- /* Reset data-ready indicator flag (will be set in the IRQ routine) */
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+ /* Reset data-ready indicator flag */
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opt->result_ready = false;
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- /* Allow IRQ to access the device despite lock being set */
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- opt->ok_to_ignore_lock = true;
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-
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/* Configure for single-conversion mode and start a new conversion */
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ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
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if (ret < 0) {
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@@ -269,32 +278,69 @@ static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
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goto err;
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}
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- /* Wait for the IRQ to indicate the conversion is complete */
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- ret = wait_event_timeout(opt->result_ready_queue, opt->result_ready,
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- OPT3001_RESULT_READY_TIMEOUT);
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+ if (opt->use_irq) {
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+ /* Wait for the IRQ to indicate the conversion is complete */
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+ ret = wait_event_timeout(opt->result_ready_queue,
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+ opt->result_ready,
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+ msecs_to_jiffies(OPT3001_RESULT_READY_LONG));
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+ } else {
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+ /* Sleep for result ready time */
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+ timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ?
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+ OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG;
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+ msleep(timeout);
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+
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+ /* Check result ready flag */
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+ ret = i2c_smbus_read_word_swapped(opt->client,
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+ OPT3001_CONFIGURATION);
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+ if (ret < 0) {
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+ dev_err(opt->dev, "failed to read register %02x\n",
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+ OPT3001_CONFIGURATION);
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+ goto err;
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+ }
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+
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+ if (!(ret & OPT3001_CONFIGURATION_CRF)) {
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+ ret = -ETIMEDOUT;
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+ goto err;
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+ }
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+
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+ /* Obtain value */
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+ ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
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+ if (ret < 0) {
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+ dev_err(opt->dev, "failed to read register %02x\n",
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+ OPT3001_RESULT);
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+ goto err;
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+ }
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+ opt->result = ret;
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+ opt->result_ready = true;
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+ }
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err:
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- /* Disallow IRQ to access the device while lock is active */
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- opt->ok_to_ignore_lock = false;
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+ if (opt->use_irq)
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+ /* Disallow IRQ to access the device while lock is active */
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+ opt->ok_to_ignore_lock = false;
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if (ret == 0)
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return -ETIMEDOUT;
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else if (ret < 0)
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return ret;
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- /*
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- * Disable the end-of-conversion interrupt mechanism by restoring the
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- * low-level limit value (clearing OPT3001_LOW_LIMIT_EOC_ENABLE). Note
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- * that selectively clearing those enable bits would affect the actual
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- * limit value due to bit-overlap and therefore can't be done.
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- */
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- value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
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- ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_LOW_LIMIT,
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- value);
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- if (ret < 0) {
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- dev_err(opt->dev, "failed to write register %02x\n",
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- OPT3001_LOW_LIMIT);
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- return ret;
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+ if (opt->use_irq) {
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+ /*
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+ * Disable the end-of-conversion interrupt mechanism by
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+ * restoring the low-level limit value (clearing
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+ * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing
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+ * those enable bits would affect the actual limit value due to
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+ * bit-overlap and therefore can't be done.
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+ */
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+ value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
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+ ret = i2c_smbus_write_word_swapped(opt->client,
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+ OPT3001_LOW_LIMIT,
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+ value);
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+ if (ret < 0) {
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+ dev_err(opt->dev, "failed to write register %02x\n",
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+ OPT3001_LOW_LIMIT);
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+ return ret;
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+ }
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}
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exponent = OPT3001_REG_EXPONENT(opt->result);
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@@ -736,12 +782,18 @@ static int opt3001_probe(struct i2c_client *client,
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return ret;
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}
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- ret = request_threaded_irq(irq, NULL, opt3001_irq,
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- IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
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- "opt3001", iio);
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- if (ret) {
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- dev_err(dev, "failed to request IRQ #%d\n", irq);
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- return ret;
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+ /* Make use of INT pin only if valid IRQ no. is given */
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+ if (irq > 0) {
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+ ret = request_threaded_irq(irq, NULL, opt3001_irq,
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+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
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+ "opt3001", iio);
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+ if (ret) {
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+ dev_err(dev, "failed to request IRQ #%d\n", irq);
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+ return ret;
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+ }
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+ opt->use_irq = true;
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+ } else {
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+ dev_dbg(opt->dev, "enabling interrupt-less operation\n");
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}
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return 0;
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@@ -754,7 +806,8 @@ static int opt3001_remove(struct i2c_client *client)
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int ret;
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u16 reg;
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- free_irq(client->irq, iio);
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+ if (opt->use_irq)
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+ free_irq(client->irq, iio);
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ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
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if (ret < 0) {
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