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@@ -22,6 +22,7 @@
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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+ * Thomas Richter <thor@math.tu-berlin.de>
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*
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* Minor modifications (Dithering enable):
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* Thomas Richter <thor@math.tu-berlin.de>
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@@ -90,7 +91,7 @@
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/*
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* LCD Vertical Display Size
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*/
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-#define VR21 0x20
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+#define VR21 0x21
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/*
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* Panel power down status
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@@ -155,16 +156,33 @@
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# define VR8F_POWER_MASK (0x3c)
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# define VR8F_POWER_POS (2)
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+/* Some Bios implementations do not restore the DVO state upon
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+ * resume from standby. Thus, this driver has to handle it
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+ * instead. The following list contains all registers that
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+ * require saving.
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+ */
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+static const uint16_t backup_addresses[] = {
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+ 0x11, 0x12,
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+ 0x18, 0x19, 0x1a, 0x1f,
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+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
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+ 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
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+ 0x8e, 0x8f,
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+ 0x10 /* this must come last */
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+};
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+
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struct ivch_priv {
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bool quiet;
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uint16_t width, height;
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+
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+ /* Register backup */
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+
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+ uint16_t reg_backup[ARRAY_SIZE(backup_addresses)];
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};
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static void ivch_dump_regs(struct intel_dvo_device *dvo);
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-
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/**
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* Reads a register on the ivch.
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*
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@@ -246,6 +264,7 @@ static bool ivch_init(struct intel_dvo_device *dvo,
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{
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struct ivch_priv *priv;
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uint16_t temp;
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+ int i;
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priv = kzalloc(sizeof(struct ivch_priv), GFP_KERNEL);
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if (priv == NULL)
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@@ -273,6 +292,14 @@ static bool ivch_init(struct intel_dvo_device *dvo,
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ivch_read(dvo, VR20, &priv->width);
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ivch_read(dvo, VR21, &priv->height);
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+ /* Make a backup of the registers to be able to restore them
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+ * upon suspend.
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+ */
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+ for (i = 0; i < ARRAY_SIZE(backup_addresses); i++)
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+ ivch_read(dvo, backup_addresses[i], priv->reg_backup + i);
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+
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+ ivch_dump_regs(dvo);
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+
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return true;
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out:
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@@ -294,12 +321,31 @@ static enum drm_mode_status ivch_mode_valid(struct intel_dvo_device *dvo,
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return MODE_OK;
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}
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+/* Restore the DVO registers after a resume
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+ * from RAM. Registers have been saved during
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+ * the initialization.
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+ */
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+static void ivch_reset(struct intel_dvo_device *dvo)
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+{
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+ struct ivch_priv *priv = dvo->dev_priv;
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+ int i;
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+
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+ DRM_DEBUG_KMS("Resetting the IVCH registers\n");
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+
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+ ivch_write(dvo, VR10, 0x0000);
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+
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+ for (i = 0; i < ARRAY_SIZE(backup_addresses); i++)
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+ ivch_write(dvo, backup_addresses[i], priv->reg_backup[i]);
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+}
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+
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/** Sets the power state of the panel connected to the ivch */
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static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)
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{
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int i;
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uint16_t vr01, vr30, backlight;
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+ ivch_reset(dvo);
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+
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/* Set the new power state of the panel. */
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if (!ivch_read(dvo, VR01, &vr01))
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return;
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@@ -308,6 +354,7 @@ static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)
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backlight = 1;
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else
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backlight = 0;
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+
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ivch_write(dvo, VR80, backlight);
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if (enable)
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@@ -334,6 +381,8 @@ static bool ivch_get_hw_state(struct intel_dvo_device *dvo)
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{
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uint16_t vr01;
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+ ivch_reset(dvo);
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+
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/* Set the new power state of the panel. */
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if (!ivch_read(dvo, VR01, &vr01))
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return false;
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@@ -348,11 +397,15 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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+ struct ivch_priv *priv = dvo->dev_priv;
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uint16_t vr40 = 0;
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uint16_t vr01 = 0;
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uint16_t vr10;
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- ivch_read(dvo, VR10, &vr10);
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+ ivch_reset(dvo);
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+
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+ vr10 = priv->reg_backup[ARRAY_SIZE(backup_addresses) - 1];
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+
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/* Enable dithering for 18 bpp pipelines */
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vr10 &= VR10_INTERFACE_DEPTH_MASK;
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if (vr10 == VR10_INTERFACE_2X18 || vr10 == VR10_INTERFACE_1X18)
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@@ -366,7 +419,7 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,
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uint16_t x_ratio, y_ratio;
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vr01 |= VR01_PANEL_FIT_ENABLE;
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- vr40 |= VR40_CLOCK_GATING_ENABLE | VR40_ENHANCED_PANEL_FITTING;
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+ vr40 |= VR40_CLOCK_GATING_ENABLE;
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x_ratio = (((mode->hdisplay - 1) << 16) /
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(adjusted_mode->hdisplay - 1)) >> 2;
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y_ratio = (((mode->vdisplay - 1) << 16) /
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@@ -381,8 +434,6 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,
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ivch_write(dvo, VR01, vr01);
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ivch_write(dvo, VR40, vr40);
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-
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- ivch_dump_regs(dvo);
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}
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static void ivch_dump_regs(struct intel_dvo_device *dvo)
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