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@@ -42,8 +42,8 @@
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#define INA2XX_CURRENT 0x04 /* readonly */
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#define INA2XX_CALIBRATION 0x05
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-#define INA226_ALERT_MASK GENMASK(2, 1)
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-#define INA266_CVRF BIT(3)
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+#define INA226_MASK_ENABLE 0x06
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+#define INA226_CVRF BIT(3)
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#define INA2XX_MAX_REGISTERS 8
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@@ -417,8 +417,8 @@ static ssize_t ina2xx_shunt_resistor_store(struct device *dev,
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.address = (_address), \
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.indexed = 1, \
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.channel = (_index), \
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- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
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- | BIT(IIO_CHAN_INFO_SCALE), \
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+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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+ BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
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.scan_index = (_index), \
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@@ -481,12 +481,12 @@ static int ina2xx_work_buffer(struct iio_dev *indio_dev)
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*/
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if (!chip->allow_async_readout)
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do {
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- ret = regmap_read(chip->regmap, INA226_ALERT_MASK,
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+ ret = regmap_read(chip->regmap, INA226_MASK_ENABLE,
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&alert);
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if (ret < 0)
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return ret;
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- alert &= INA266_CVRF;
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+ alert &= INA226_CVRF;
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} while (!alert);
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/*
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