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@@ -402,6 +402,9 @@ typedef struct drm_i915_irq_wait {
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* priorities and the driver will attempt to execute batches in priority order.
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* priorities and the driver will attempt to execute batches in priority order.
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* The param returns a capability bitmask, nonzero implies that the scheduler
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* The param returns a capability bitmask, nonzero implies that the scheduler
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* is enabled, with different features present according to the mask.
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* is enabled, with different features present according to the mask.
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+ *
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+ * The initial priority for each batch is supplied by the context and is
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+ * controlled via I915_CONTEXT_PARAM_PRIORITY.
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*/
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*/
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#define I915_PARAM_HAS_SCHEDULER 41
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#define I915_PARAM_HAS_SCHEDULER 41
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#define I915_SCHEDULER_CAP_ENABLED (1ul << 0)
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#define I915_SCHEDULER_CAP_ENABLED (1ul << 0)
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@@ -1367,6 +1370,10 @@ struct drm_i915_gem_context_param {
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#define I915_CONTEXT_PARAM_GTT_SIZE 0x3
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#define I915_CONTEXT_PARAM_GTT_SIZE 0x3
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#define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4
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#define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4
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#define I915_CONTEXT_PARAM_BANNABLE 0x5
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#define I915_CONTEXT_PARAM_BANNABLE 0x5
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+#define I915_CONTEXT_PARAM_PRIORITY 0x6
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+#define I915_CONTEXT_MAX_USER_PRIORITY 1023 /* inclusive */
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+#define I915_CONTEXT_DEFAULT_PRIORITY 0
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+#define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */
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__u64 value;
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__u64 value;
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};
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};
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