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@@ -34,6 +34,7 @@
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#include <linux/property.h>
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#include <linux/crc32.h>
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#include <linux/if_vlan.h>
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+#include <linux/of_net.h>
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#include <net/ip.h>
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#include <net/ncsi.h>
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@@ -1051,7 +1052,7 @@ static void ftgmac100_adjust_link(struct net_device *netdev)
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schedule_work(&priv->reset_task);
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}
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-static int ftgmac100_mii_probe(struct ftgmac100 *priv)
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+static int ftgmac100_mii_probe(struct ftgmac100 *priv, phy_interface_t intf)
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{
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struct net_device *netdev = priv->netdev;
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struct phy_device *phydev;
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@@ -1063,7 +1064,7 @@ static int ftgmac100_mii_probe(struct ftgmac100 *priv)
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}
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phydev = phy_connect(netdev, phydev_name(phydev),
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- &ftgmac100_adjust_link, PHY_INTERFACE_MODE_GMII);
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+ &ftgmac100_adjust_link, intf);
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if (IS_ERR(phydev)) {
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netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name);
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@@ -1618,6 +1619,8 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
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{
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struct ftgmac100 *priv = netdev_priv(netdev);
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struct platform_device *pdev = to_platform_device(priv->dev);
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+ int phy_intf = PHY_INTERFACE_MODE_RGMII;
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+ struct device_node *np = pdev->dev.of_node;
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int i, err = 0;
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u32 reg;
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@@ -1633,6 +1636,39 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
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iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR);
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};
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+ /* Get PHY mode from device-tree */
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+ if (np) {
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+ /* Default to RGMII. It's a gigabit part after all */
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+ phy_intf = of_get_phy_mode(np);
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+ if (phy_intf < 0)
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+ phy_intf = PHY_INTERFACE_MODE_RGMII;
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+
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+ /* Aspeed only supports these. I don't know about other IP
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+ * block vendors so I'm going to just let them through for
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+ * now. Note that this is only a warning if for some obscure
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+ * reason the DT really means to lie about it or it's a newer
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+ * part we don't know about.
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+ *
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+ * On the Aspeed SoC there are additionally straps and SCU
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+ * control bits that could tell us what the interface is
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+ * (or allow us to configure it while the IP block is held
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+ * in reset). For now I chose to keep this driver away from
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+ * those SoC specific bits and assume the device-tree is
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+ * right and the SCU has been configured properly by pinmux
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+ * or the firmware.
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+ */
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+ if (priv->is_aspeed &&
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+ phy_intf != PHY_INTERFACE_MODE_RMII &&
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+ phy_intf != PHY_INTERFACE_MODE_RGMII &&
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+ phy_intf != PHY_INTERFACE_MODE_RGMII_ID &&
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+ phy_intf != PHY_INTERFACE_MODE_RGMII_RXID &&
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+ phy_intf != PHY_INTERFACE_MODE_RGMII_TXID) {
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+ netdev_warn(netdev,
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+ "Unsupported PHY mode %s !\n",
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+ phy_modes(phy_intf));
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+ }
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+ }
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+
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priv->mii_bus->name = "ftgmac100_mdio";
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snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d",
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pdev->name, pdev->id);
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@@ -1649,7 +1685,7 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
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goto err_register_mdiobus;
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}
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- err = ftgmac100_mii_probe(priv);
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+ err = ftgmac100_mii_probe(priv, phy_intf);
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if (err) {
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dev_err(priv->dev, "MII Probe failed!\n");
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goto err_mii_probe;
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