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@@ -1006,8 +1006,8 @@ static int mvebu_pcie_probe(struct platform_device *pdev)
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ret = mvebu_get_tgt_attr(np, port->devfn, IORESOURCE_MEM,
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&port->mem_target, &port->mem_attr);
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if (ret < 0) {
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- dev_err(&pdev->dev, "PCIe%d.%d: cannot get tgt/attr for mem window\n",
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- port->port, port->lane);
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+ dev_err(&pdev->dev, "%s: cannot get tgt/attr for mem window\n",
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+ port->name);
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continue;
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}
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@@ -1025,8 +1025,8 @@ static int mvebu_pcie_probe(struct platform_device *pdev)
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u32 reset_udelay = 20000;
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port->reset_active_low = flags & OF_GPIO_ACTIVE_LOW;
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- port->reset_name = kasprintf(GFP_KERNEL,
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- "pcie%d.%d-reset", port->port, port->lane);
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+ port->reset_name = kasprintf(GFP_KERNEL, "%s-reset",
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+ port->name);
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of_property_read_u32(child, "reset-delay-us",
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&reset_udelay);
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@@ -1045,8 +1045,8 @@ static int mvebu_pcie_probe(struct platform_device *pdev)
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port->clk = of_clk_get_by_name(child, NULL);
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if (IS_ERR(port->clk)) {
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- dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n",
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- port->port, port->lane);
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+ dev_err(&pdev->dev, "%s: cannot get clock\n",
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+ port->name);
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continue;
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}
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@@ -1056,8 +1056,8 @@ static int mvebu_pcie_probe(struct platform_device *pdev)
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port->base = mvebu_pcie_map_registers(pdev, child, port);
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if (IS_ERR(port->base)) {
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- dev_err(&pdev->dev, "PCIe%d.%d: cannot map registers\n",
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- port->port, port->lane);
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+ dev_err(&pdev->dev, "%s: cannot map registers\n",
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+ port->name);
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port->base = NULL;
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clk_disable_unprepare(port->clk);
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continue;
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