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tools build: Add Makefile.include

To ease up build framework code setup for users.

More shared code will be added in the following patches.

Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Cc: David Ahern <dsahern@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1443004442-32660-2-git-send-email-jolsa@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Jiri Olsa 10 жил өмнө
parent
commit
ab6201d09b

+ 32 - 13
tools/build/Documentation/Build.txt

@@ -11,8 +11,9 @@ Unlike the kernel we don't have a single build object 'obj-y' list that where
 we setup source objects, but we support more. This allows one 'Build' file to
 we setup source objects, but we support more. This allows one 'Build' file to
 carry a sources list for multiple build objects.
 carry a sources list for multiple build objects.
 
 
-a) Build framework makefiles
-----------------------------
+
+Build framework makefiles
+-------------------------
 
 
 The build framework consists of 2 Makefiles:
 The build framework consists of 2 Makefiles:
 
 
@@ -23,7 +24,7 @@ While the 'Build.include' file contains just some generic definitions, the
 'Makefile.build' file is the makefile used from the outside. It's
 'Makefile.build' file is the makefile used from the outside. It's
 interface/usage is following:
 interface/usage is following:
 
 
-  $ make -f tools/build/Makefile srctree=$(KSRC) dir=$(DIR) obj=$(OBJECT)
+  $ make -f tools/build/Makefile.build srctree=$(KSRC) dir=$(DIR) obj=$(OBJECT)
 
 
 where:
 where:
 
 
@@ -38,8 +39,9 @@ called $(OBJECT)-in.o:
 
 
 which includes all compiled sources described in 'Build' makefiles.
 which includes all compiled sources described in 'Build' makefiles.
 
 
-a) Build makefiles
-------------------
+
+Build makefiles
+---------------
 
 
 The user supplies 'Build' makefiles that contains a objects list, and connects
 The user supplies 'Build' makefiles that contains a objects list, and connects
 the build to nested directories.
 the build to nested directories.
@@ -95,8 +97,24 @@ It's only a matter of 2 single commands to create the final binaries:
 
 
 You can check the 'ex' example in 'tools/build/tests/ex' for more details.
 You can check the 'ex' example in 'tools/build/tests/ex' for more details.
 
 
-b) Rules
---------
+
+Makefile.include
+----------------
+
+The tools/build/Makefile.include makefile could be included
+via user makefiles to get usefull definitions.
+
+It defines following interface:
+
+  - build macro definition:
+      build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+
+    to make it easier to invoke build like:
+      make $(build)=ex
+
+
+Rules
+-----
 
 
 The build framework provides standard compilation rules to handle .S and .c
 The build framework provides standard compilation rules to handle .S and .c
 compilation.
 compilation.
@@ -104,8 +122,9 @@ compilation.
 It's possible to include special rule if needed (like we do for flex or bison
 It's possible to include special rule if needed (like we do for flex or bison
 code generation).
 code generation).
 
 
-c) CFLAGS
----------
+
+CFLAGS
+------
 
 
 It's possible to alter the standard object C flags in the following way:
 It's possible to alter the standard object C flags in the following way:
 
 
@@ -115,8 +134,8 @@ It's possible to alter the standard object C flags in the following way:
 This C flags changes has the scope of the Build makefile they are defined in.
 This C flags changes has the scope of the Build makefile they are defined in.
 
 
 
 
-d) Dependencies
----------------
+Dependencies
+------------
 
 
 For each built object file 'a.o' the '.a.cmd' is created and holds:
 For each built object file 'a.o' the '.a.cmd' is created and holds:
 
 
@@ -130,8 +149,8 @@ All existing '.cmd' files are included in the Build process to follow properly
 the dependencies and trigger a rebuild when necessary.
 the dependencies and trigger a rebuild when necessary.
 
 
 
 
-e) Single rules
----------------
+Single rules
+------------
 
 
 It's possible to build single object file by choice, like:
 It's possible to build single object file by choice, like:
 
 

+ 1 - 0
tools/build/Makefile.include

@@ -0,0 +1 @@
+build := -f $(srctree)/tools/build/Makefile.build dir=. obj

+ 2 - 1
tools/build/tests/ex/Makefile

@@ -3,7 +3,8 @@ export CC      := gcc
 export LD      := ld
 export LD      := ld
 export AR      := ar
 export AR      := ar
 
 
-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+include $(srctree)/tools/build/Makefile.include
+
 ex: ex-in.o libex-in.o
 ex: ex-in.o libex-in.o
 	gcc -o $@ $^
 	gcc -o $@ $^
 
 

+ 1 - 1
tools/lib/api/Makefile

@@ -21,10 +21,10 @@ CFLAGS += -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64
 
 
 RM = rm -f
 RM = rm -f
 
 
-build  := -f $(srctree)/tools/build/Makefile.build dir=. obj
 API_IN := $(OUTPUT)libapi-in.o
 API_IN := $(OUTPUT)libapi-in.o
 
 
 export srctree OUTPUT CC LD CFLAGS V
 export srctree OUTPUT CC LD CFLAGS V
+include $(srctree)/tools/build/Makefile.include
 
 
 all: $(LIBFILE)
 all: $(LIBFILE)
 
 

+ 1 - 1
tools/lib/bpf/Makefile

@@ -124,7 +124,7 @@ endif
 MAKEOVERRIDES=
 MAKEOVERRIDES=
 
 
 export srctree OUTPUT CC LD CFLAGS V
 export srctree OUTPUT CC LD CFLAGS V
-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+include $(srctree)/tools/build/Makefile.include
 
 
 BPF_IN    := $(OUTPUT)libbpf-in.o
 BPF_IN    := $(OUTPUT)libbpf-in.o
 LIB_FILE := $(addprefix $(OUTPUT),$(LIB_FILE))
 LIB_FILE := $(addprefix $(OUTPUT),$(LIB_FILE))

+ 1 - 1
tools/lib/lockdep/Makefile

@@ -94,7 +94,7 @@ else
 endif
 endif
 
 
 export srctree OUTPUT CC LD CFLAGS V
 export srctree OUTPUT CC LD CFLAGS V
-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+include $(srctree)/tools/build/Makefile.include
 
 
 do_compile_shared_library =			\
 do_compile_shared_library =			\
 	($(print_shared_lib_compile)		\
 	($(print_shared_lib_compile)		\

+ 1 - 1
tools/perf/Makefile.perf

@@ -297,7 +297,7 @@ strip: $(PROGRAMS) $(OUTPUT)perf
 PERF_IN := $(OUTPUT)perf-in.o
 PERF_IN := $(OUTPUT)perf-in.o
 
 
 export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX AWK
 export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX AWK
-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+include $(srctree)/tools/build/Makefile.include
 
 
 $(PERF_IN): $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h FORCE
 $(PERF_IN): $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h FORCE
 	$(Q)$(MAKE) $(build)=perf
 	$(Q)$(MAKE) $(build)=perf