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@@ -33,10 +33,6 @@
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#define TBCTL 0x00
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#define TBPRD 0x0A
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-#define TBCTL_RUN_MASK (BIT(15) | BIT(14))
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-#define TBCTL_STOP_NEXT 0
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-#define TBCTL_STOP_ON_CYCLE BIT(14)
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-#define TBCTL_FREE_RUN (BIT(15) | BIT(14))
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#define TBCTL_PRDLD_MASK BIT(3)
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#define TBCTL_PRDLD_SHDW 0
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#define TBCTL_PRDLD_IMDT BIT(3)
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@@ -360,7 +356,7 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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/* Channels polarity can be configured from action qualifier module */
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configure_polarity(pc, pwm->hwpwm);
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- /* Enable TBCLK before enabling PWM device */
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+ /* Enable TBCLK */
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ret = clk_enable(pc->tbclk);
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if (ret) {
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dev_err(chip->dev, "Failed to enable TBCLK for %s: %d\n",
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@@ -368,9 +364,6 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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return ret;
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}
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- /* Enable time counter for free_run */
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- ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_FREE_RUN);
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-
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return 0;
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}
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@@ -400,9 +393,6 @@ static void ehrpwm_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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/* Disabling TBCLK on PWM disable */
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clk_disable(pc->tbclk);
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- /* Stop Time base counter */
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- ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_STOP_NEXT);
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-
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/* Disable clock on PWM disable */
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pm_runtime_put_sync(chip->dev);
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}
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