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@@ -510,11 +510,12 @@ CLK_OF_DECLARE(sun7i_a20_gmac, "allwinner,sun7i-a20-gmac-clk",
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* clk_sunxi_mmc_phase_control() - configures MMC clock phase control
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*/
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-void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output)
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+void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)
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{
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#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
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#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
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+ struct clk_hw *hw = __clk_get_hw(clk);
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struct clk_composite *composite = to_clk_composite(hw);
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struct clk_hw *rate_hw = composite->rate_hw;
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struct clk_factors *factors = to_clk_factors(rate_hw);
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