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@@ -752,6 +752,7 @@ static struct sh_eth_cpu_data sh7757_data = {
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.rpadir = 1,
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.rpadir = 1,
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.rpadir_value = 2 << 16,
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.rpadir_value = 2 << 16,
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.rtrate = 1,
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.rtrate = 1,
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+ .dual_port = 1,
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};
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};
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#define SH_GIGA_ETH_BASE 0xfee00000UL
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#define SH_GIGA_ETH_BASE 0xfee00000UL
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@@ -830,6 +831,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = {
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.no_trimd = 1,
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.no_trimd = 1,
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.no_ade = 1,
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.no_ade = 1,
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.tsu = 1,
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.tsu = 1,
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+ .dual_port = 1,
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};
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};
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/* SH7734 */
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/* SH7734 */
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@@ -900,6 +902,7 @@ static struct sh_eth_cpu_data sh7763_data = {
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.tsu = 1,
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.tsu = 1,
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.irq_flags = IRQF_SHARED,
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.irq_flags = IRQF_SHARED,
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.magic = 1,
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.magic = 1,
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+ .dual_port = 1,
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};
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};
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static struct sh_eth_cpu_data sh7619_data = {
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static struct sh_eth_cpu_data sh7619_data = {
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@@ -932,6 +935,7 @@ static struct sh_eth_cpu_data sh771x_data = {
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EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
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EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
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EESIPR_PREIP | EESIPR_CERFIP,
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EESIPR_PREIP | EESIPR_CERFIP,
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.tsu = 1,
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.tsu = 1,
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+ .dual_port = 1,
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};
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};
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static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd)
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static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd)
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@@ -2915,7 +2919,7 @@ static int sh_eth_vlan_rx_kill_vid(struct net_device *ndev,
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/* SuperH's TSU register init function */
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/* SuperH's TSU register init function */
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static void sh_eth_tsu_init(struct sh_eth_private *mdp)
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static void sh_eth_tsu_init(struct sh_eth_private *mdp)
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{
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{
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- if (sh_eth_is_rz_fast_ether(mdp)) {
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+ if (!mdp->cd->dual_port) {
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sh_eth_tsu_write(mdp, 0, TSU_TEN); /* Disable all CAM entry */
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sh_eth_tsu_write(mdp, 0, TSU_TEN); /* Disable all CAM entry */
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sh_eth_tsu_write(mdp, TSU_FWSLC_POSTENU | TSU_FWSLC_POSTENL,
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sh_eth_tsu_write(mdp, TSU_FWSLC_POSTENU | TSU_FWSLC_POSTENL,
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TSU_FWSLC); /* Enable POST registers */
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TSU_FWSLC); /* Enable POST registers */
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