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@@ -8417,109 +8417,6 @@ static bool cursor_size_ok(struct drm_device *dev,
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return true;
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}
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-static int intel_crtc_cursor_set_obj(struct drm_crtc *crtc,
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- struct drm_i915_gem_object *obj,
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- uint32_t width, uint32_t height)
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-{
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- struct drm_device *dev = crtc->dev;
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- struct drm_i915_private *dev_priv = to_i915(dev);
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- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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- enum pipe pipe = intel_crtc->pipe;
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- unsigned old_width;
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- uint32_t addr;
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- int ret;
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-
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- /* if we want to turn off the cursor ignore width and height */
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- if (!obj) {
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- DRM_DEBUG_KMS("cursor off\n");
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- addr = 0;
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- mutex_lock(&dev->struct_mutex);
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- goto finish;
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- }
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-
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- /* we only need to pin inside GTT if cursor is non-phy */
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- mutex_lock(&dev->struct_mutex);
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- if (!INTEL_INFO(dev)->cursor_needs_physical) {
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- unsigned alignment;
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-
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- /*
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- * Global gtt pte registers are special registers which actually
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- * forward writes to a chunk of system memory. Which means that
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- * there is no risk that the register values disappear as soon
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- * as we call intel_runtime_pm_put(), so it is correct to wrap
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- * only the pin/unpin/fence and not more.
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- */
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- intel_runtime_pm_get(dev_priv);
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-
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- /* Note that the w/a also requires 2 PTE of padding following
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- * the bo. We currently fill all unused PTE with the shadow
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- * page and so we should always have valid PTE following the
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- * cursor preventing the VT-d warning.
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- */
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- alignment = 0;
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- if (need_vtd_wa(dev))
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- alignment = 64*1024;
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-
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- ret = i915_gem_object_pin_to_display_plane(obj, alignment, NULL);
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- if (ret) {
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- DRM_DEBUG_KMS("failed to move cursor bo into the GTT\n");
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- intel_runtime_pm_put(dev_priv);
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- goto fail_locked;
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- }
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-
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- ret = i915_gem_object_put_fence(obj);
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- if (ret) {
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- DRM_DEBUG_KMS("failed to release fence for cursor");
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- intel_runtime_pm_put(dev_priv);
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- goto fail_unpin;
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- }
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-
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- addr = i915_gem_obj_ggtt_offset(obj);
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-
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- intel_runtime_pm_put(dev_priv);
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- } else {
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- int align = IS_I830(dev) ? 16 * 1024 : 256;
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- ret = i915_gem_object_attach_phys(obj, align);
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- if (ret) {
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- DRM_DEBUG_KMS("failed to attach phys object\n");
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- goto fail_locked;
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- }
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- addr = obj->phys_handle->busaddr;
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- }
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-
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- finish:
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- if (intel_crtc->cursor_bo) {
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- if (!INTEL_INFO(dev)->cursor_needs_physical)
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- i915_gem_object_unpin_from_display_plane(intel_crtc->cursor_bo);
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- }
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-
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- i915_gem_track_fb(intel_crtc->cursor_bo, obj,
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- INTEL_FRONTBUFFER_CURSOR(pipe));
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- mutex_unlock(&dev->struct_mutex);
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-
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- old_width = intel_crtc->cursor_width;
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-
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- intel_crtc->cursor_addr = addr;
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- intel_crtc->cursor_bo = obj;
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- intel_crtc->cursor_width = width;
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- intel_crtc->cursor_height = height;
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-
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- if (intel_crtc->active) {
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- if (old_width != width)
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- intel_update_watermarks(crtc);
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- intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
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-
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- intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_CURSOR(pipe));
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- }
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-
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- return 0;
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-fail_unpin:
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- i915_gem_object_unpin_from_display_plane(obj);
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-fail_locked:
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- mutex_unlock(&dev->struct_mutex);
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- return ret;
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-}
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-
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static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
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u16 *blue, uint32_t start, uint32_t size)
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{
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@@ -12129,7 +12026,8 @@ intel_cursor_plane_disable(struct drm_plane *plane)
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BUG_ON(!plane->crtc);
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- return intel_crtc_cursor_set_obj(plane->crtc, NULL, 0, 0);
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+ return plane->funcs->update_plane(plane, plane->crtc, NULL,
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+ 0, 0, 0, 0, 0, 0, 0, 0);
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}
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static int
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@@ -12193,12 +12091,15 @@ intel_commit_cursor_plane(struct drm_plane *plane,
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struct intel_plane_state *state)
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{
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struct drm_crtc *crtc = state->crtc;
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- struct drm_framebuffer *fb = state->fb;
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+ struct drm_device *dev = crtc->dev;
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_plane *intel_plane = to_intel_plane(plane);
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- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
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- struct drm_i915_gem_object *obj = intel_fb->obj;
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- int crtc_w, crtc_h;
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+ struct drm_i915_gem_object *obj = intel_fb_obj(state->fb);
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+ enum pipe pipe = intel_crtc->pipe;
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+ unsigned old_width;
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+ uint32_t addr;
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+ int ret;
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crtc->cursor_x = state->orig_dst.x1;
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crtc->cursor_y = state->orig_dst.y1;
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@@ -12213,18 +12114,100 @@ intel_commit_cursor_plane(struct drm_plane *plane,
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intel_plane->src_h = drm_rect_height(&state->orig_src);
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intel_plane->obj = obj;
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- if (fb != crtc->cursor->fb) {
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- crtc_w = drm_rect_width(&state->orig_dst);
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- crtc_h = drm_rect_height(&state->orig_dst);
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- return intel_crtc_cursor_set_obj(crtc, obj, crtc_w, crtc_h);
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+ if (intel_crtc->cursor_bo == obj)
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+ goto update;
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+
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+ /* if we want to turn off the cursor ignore width and height */
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+ if (!obj) {
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+ DRM_DEBUG_KMS("cursor off\n");
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+ addr = 0;
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+ mutex_lock(&dev->struct_mutex);
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+ goto finish;
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+ }
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+
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+ /* we only need to pin inside GTT if cursor is non-phy */
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+ mutex_lock(&dev->struct_mutex);
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+ if (!INTEL_INFO(dev)->cursor_needs_physical) {
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+ unsigned alignment;
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+
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+ /*
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+ * Global gtt pte registers are special registers which actually
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|
+ * forward writes to a chunk of system memory. Which means that
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|
+ * there is no risk that the register values disappear as soon
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|
|
+ * as we call intel_runtime_pm_put(), so it is correct to wrap
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+ * only the pin/unpin/fence and not more.
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|
|
+ */
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+ intel_runtime_pm_get(dev_priv);
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+
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+ /* Note that the w/a also requires 2 PTE of padding following
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|
+ * the bo. We currently fill all unused PTE with the shadow
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|
+ * page and so we should always have valid PTE following the
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+ * cursor preventing the VT-d warning.
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+ */
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+ alignment = 0;
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+ if (need_vtd_wa(dev))
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+ alignment = 64*1024;
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+
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+ ret = i915_gem_object_pin_to_display_plane(obj, alignment, NULL);
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+ if (ret) {
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+ DRM_DEBUG_KMS("failed to move cursor bo into the GTT\n");
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+ intel_runtime_pm_put(dev_priv);
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+ goto fail_locked;
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+ }
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+
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+ ret = i915_gem_object_put_fence(obj);
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+ if (ret) {
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+ DRM_DEBUG_KMS("failed to release fence for cursor");
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+ intel_runtime_pm_put(dev_priv);
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+ goto fail_unpin;
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+ }
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+
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+ addr = i915_gem_obj_ggtt_offset(obj);
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+
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+ intel_runtime_pm_put(dev_priv);
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+
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} else {
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- intel_crtc_update_cursor(crtc, state->visible);
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+ int align = IS_I830(dev) ? 16 * 1024 : 256;
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+ ret = i915_gem_object_attach_phys(obj, align);
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+ if (ret) {
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+ DRM_DEBUG_KMS("failed to attach phys object\n");
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+ goto fail_locked;
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+ }
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+ addr = obj->phys_handle->busaddr;
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+ }
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- intel_frontbuffer_flip(crtc->dev,
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- INTEL_FRONTBUFFER_CURSOR(intel_crtc->pipe));
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+finish:
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+ if (intel_crtc->cursor_bo) {
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+ if (!INTEL_INFO(dev)->cursor_needs_physical)
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+ i915_gem_object_unpin_from_display_plane(intel_crtc->cursor_bo);
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+ }
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- return 0;
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+ i915_gem_track_fb(intel_crtc->cursor_bo, obj,
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+ INTEL_FRONTBUFFER_CURSOR(pipe));
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+ mutex_unlock(&dev->struct_mutex);
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+
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+ intel_crtc->cursor_addr = addr;
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+ intel_crtc->cursor_bo = obj;
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+update:
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+ old_width = intel_crtc->cursor_width;
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+
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+ intel_crtc->cursor_width = drm_rect_width(&state->orig_dst);
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+ intel_crtc->cursor_height = drm_rect_height(&state->orig_dst);
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+
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+ if (intel_crtc->active) {
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+ if (old_width != intel_crtc->cursor_width)
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+ intel_update_watermarks(crtc);
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+ intel_crtc_update_cursor(crtc, state->visible);
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+
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+ intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_CURSOR(pipe));
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}
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+
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+ return 0;
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+fail_unpin:
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+ i915_gem_object_unpin_from_display_plane(obj);
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+fail_locked:
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+ mutex_unlock(&dev->struct_mutex);
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+ return ret;
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}
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static int
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