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@@ -6,7 +6,7 @@ QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
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Required properties:
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- compatible: compatible list, contains
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"qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996,
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- "qcom,qusb2-v2-phy" for QUSB2 V2 PHY.
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+ "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845.
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- reg: offset and length of the PHY register set.
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- #phy-cells: must be 0.
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@@ -27,6 +27,27 @@ Optional properties:
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tuning parameter value for qusb2 phy.
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- qcom,tcsr-syscon: Phandle to TCSR syscon register region.
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+ - qcom,imp-res-offset-value: It is a 6 bit value that specifies offset to be
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+ added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
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+ tuning parameter that may vary for different boards of same SOC.
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+ This property is applicable to only QUSB2 v2 PHY (sdm845).
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+ - qcom,hstx-trim-value: It is a 4 bit value that specifies tuning for HSTX
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+ output current.
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+ Possible range is - 15mA to 24mA (stepsize of 600 uA).
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+ See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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+ This property is applicable to only QUSB2 v2 PHY (sdm845).
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+ Default value is 22.2mA for sdm845.
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+ - qcom,preemphasis-level: It is a 2 bit value that specifies pre-emphasis level.
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+ Possible range is 0 to 15% (stepsize of 5%).
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+ See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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+ This property is applicable to only QUSB2 v2 PHY (sdm845).
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+ Default value is 10% for sdm845.
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+- qcom,preemphasis-width: It is a 1 bit value that specifies how long the HSTX
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+ pre-emphasis (specified using qcom,preemphasis-level) must be in
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+ effect. Duration could be half-bit of full-bit.
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+ See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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+ This property is applicable to only QUSB2 v2 PHY (sdm845).
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+ Default value is full-bit width for sdm845.
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Example:
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hsusb_phy: phy@7411000 {
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