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@@ -0,0 +1,2048 @@
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+/*
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+ * Copyright(C) 2015 Linaro Limited. All rights reserved.
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+ * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published by
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+ * the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful, but WITHOUT
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+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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+ * more details.
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+ *
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+ * You should have received a copy of the GNU General Public License along with
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+ * this program. If not, see <http://www.gnu.org/licenses/>.
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+ */
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+
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+#include <linux/pm_runtime.h>
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+#include <linux/sysfs.h>
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+#include "coresight-etm4x.h"
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+
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+static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude)
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+{
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+ u8 idx = drvdata->addr_idx;
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+
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+ /*
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+ * TRCACATRn.TYPE bit[1:0]: type of comparison
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+ * the trace unit performs
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+ */
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+ if (BMVAL(drvdata->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) {
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+ if (idx % 2 != 0)
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+ return -EINVAL;
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+
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+ /*
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+ * We are performing instruction address comparison. Set the
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+ * relevant bit of ViewInst Include/Exclude Control register
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+ * for corresponding address comparator pair.
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+ */
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+ if (drvdata->addr_type[idx] != ETM_ADDR_TYPE_RANGE ||
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+ drvdata->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE)
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+ return -EINVAL;
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+
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+ if (exclude == true) {
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+ /*
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+ * Set exclude bit and unset the include bit
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+ * corresponding to comparator pair
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+ */
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+ drvdata->viiectlr |= BIT(idx / 2 + 16);
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+ drvdata->viiectlr &= ~BIT(idx / 2);
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+ } else {
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+ /*
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+ * Set include bit and unset exclude bit
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+ * corresponding to comparator pair
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+ */
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+ drvdata->viiectlr |= BIT(idx / 2);
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+ drvdata->viiectlr &= ~BIT(idx / 2 + 16);
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+ }
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+ }
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+ return 0;
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+}
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+
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+static ssize_t nr_pe_cmp_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->nr_pe_cmp;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(nr_pe_cmp);
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+
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+static ssize_t nr_addr_cmp_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->nr_addr_cmp;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(nr_addr_cmp);
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+
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+static ssize_t nr_cntr_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->nr_cntr;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(nr_cntr);
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+
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+static ssize_t nr_ext_inp_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->nr_ext_inp;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(nr_ext_inp);
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+
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+static ssize_t numcidc_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->numcidc;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(numcidc);
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+
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+static ssize_t numvmidc_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->numvmidc;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(numvmidc);
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+
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+static ssize_t nrseqstate_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->nrseqstate;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(nrseqstate);
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+
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+static ssize_t nr_resource_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->nr_resource;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(nr_resource);
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+
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+static ssize_t nr_ss_cmp_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->nr_ss_cmp;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+static DEVICE_ATTR_RO(nr_ss_cmp);
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+
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+static ssize_t reset_store(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf, size_t size)
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+{
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+ int i;
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ if (kstrtoul(buf, 16, &val))
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+ return -EINVAL;
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+
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+ spin_lock(&drvdata->spinlock);
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+ if (val)
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+ drvdata->mode = 0x0;
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+
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+ /* Disable data tracing: do not trace load and store data transfers */
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+ drvdata->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE);
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+ drvdata->cfg &= ~(BIT(1) | BIT(2));
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+
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+ /* Disable data value and data address tracing */
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+ drvdata->mode &= ~(ETM_MODE_DATA_TRACE_ADDR |
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+ ETM_MODE_DATA_TRACE_VAL);
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+ drvdata->cfg &= ~(BIT(16) | BIT(17));
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+
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+ /* Disable all events tracing */
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+ drvdata->eventctrl0 = 0x0;
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+ drvdata->eventctrl1 = 0x0;
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+
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+ /* Disable timestamp event */
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+ drvdata->ts_ctrl = 0x0;
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+
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+ /* Disable stalling */
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+ drvdata->stall_ctrl = 0x0;
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+
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+ /* Reset trace synchronization period to 2^8 = 256 bytes*/
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+ if (drvdata->syncpr == false)
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+ drvdata->syncfreq = 0x8;
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+
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+ /*
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+ * Enable ViewInst to trace everything with start-stop logic in
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+ * started state. ARM recommends start-stop logic is set before
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+ * each trace run.
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+ */
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+ drvdata->vinst_ctrl |= BIT(0);
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+ if (drvdata->nr_addr_cmp == true) {
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+ drvdata->mode |= ETM_MODE_VIEWINST_STARTSTOP;
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+ /* SSSTATUS, bit[9] */
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+ drvdata->vinst_ctrl |= BIT(9);
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+ }
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+
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+ /* No address range filtering for ViewInst */
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+ drvdata->viiectlr = 0x0;
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+
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+ /* No start-stop filtering for ViewInst */
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+ drvdata->vissctlr = 0x0;
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+
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+ /* Disable seq events */
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+ for (i = 0; i < drvdata->nrseqstate-1; i++)
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+ drvdata->seq_ctrl[i] = 0x0;
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+ drvdata->seq_rst = 0x0;
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+ drvdata->seq_state = 0x0;
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+
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+ /* Disable external input events */
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+ drvdata->ext_inp = 0x0;
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+
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+ drvdata->cntr_idx = 0x0;
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+ for (i = 0; i < drvdata->nr_cntr; i++) {
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+ drvdata->cntrldvr[i] = 0x0;
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+ drvdata->cntr_ctrl[i] = 0x0;
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+ drvdata->cntr_val[i] = 0x0;
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+ }
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+
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+ drvdata->res_idx = 0x0;
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+ for (i = 0; i < drvdata->nr_resource; i++)
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+ drvdata->res_ctrl[i] = 0x0;
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+
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+ for (i = 0; i < drvdata->nr_ss_cmp; i++) {
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+ drvdata->ss_ctrl[i] = 0x0;
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+ drvdata->ss_pe_cmp[i] = 0x0;
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+ }
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+
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+ drvdata->addr_idx = 0x0;
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+ for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
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+ drvdata->addr_val[i] = 0x0;
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+ drvdata->addr_acc[i] = 0x0;
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+ drvdata->addr_type[i] = ETM_ADDR_TYPE_NONE;
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+ }
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+
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+ drvdata->ctxid_idx = 0x0;
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+ for (i = 0; i < drvdata->numcidc; i++) {
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+ drvdata->ctxid_pid[i] = 0x0;
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+ drvdata->ctxid_vpid[i] = 0x0;
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+ }
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+
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+ drvdata->ctxid_mask0 = 0x0;
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+ drvdata->ctxid_mask1 = 0x0;
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+
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+ drvdata->vmid_idx = 0x0;
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+ for (i = 0; i < drvdata->numvmidc; i++)
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+ drvdata->vmid_val[i] = 0x0;
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+ drvdata->vmid_mask0 = 0x0;
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+ drvdata->vmid_mask1 = 0x0;
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+
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+ drvdata->trcid = drvdata->cpu + 1;
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+ spin_unlock(&drvdata->spinlock);
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+ return size;
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+}
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+static DEVICE_ATTR_WO(reset);
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+
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+static ssize_t mode_show(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ unsigned long val;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ val = drvdata->mode;
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+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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+}
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+
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+static ssize_t mode_store(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf, size_t size)
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+{
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+ unsigned long val, mode;
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+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
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+
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+ if (kstrtoul(buf, 16, &val))
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+ return -EINVAL;
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+
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+ spin_lock(&drvdata->spinlock);
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+ drvdata->mode = val & ETMv4_MODE_ALL;
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+
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+ if (drvdata->mode & ETM_MODE_EXCLUDE)
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+ etm4_set_mode_exclude(drvdata, true);
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+ else
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+ etm4_set_mode_exclude(drvdata, false);
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+
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+ if (drvdata->instrp0 == true) {
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+ /* start by clearing instruction P0 field */
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+ drvdata->cfg &= ~(BIT(1) | BIT(2));
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+ if (drvdata->mode & ETM_MODE_LOAD)
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+ /* 0b01 Trace load instructions as P0 instructions */
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+ drvdata->cfg |= BIT(1);
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+ if (drvdata->mode & ETM_MODE_STORE)
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+ /* 0b10 Trace store instructions as P0 instructions */
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+ drvdata->cfg |= BIT(2);
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+ if (drvdata->mode & ETM_MODE_LOAD_STORE)
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+ /*
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+ * 0b11 Trace load and store instructions
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+ * as P0 instructions
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+ */
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+ drvdata->cfg |= BIT(1) | BIT(2);
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+ }
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+
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+ /* bit[3], Branch broadcast mode */
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+ if ((drvdata->mode & ETM_MODE_BB) && (drvdata->trcbb == true))
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+ drvdata->cfg |= BIT(3);
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+ else
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+ drvdata->cfg &= ~BIT(3);
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+
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+ /* bit[4], Cycle counting instruction trace bit */
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+ if ((drvdata->mode & ETMv4_MODE_CYCACC) &&
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+ (drvdata->trccci == true))
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+ drvdata->cfg |= BIT(4);
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+ else
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+ drvdata->cfg &= ~BIT(4);
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+
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+ /* bit[6], Context ID tracing bit */
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+ if ((drvdata->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size))
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+ drvdata->cfg |= BIT(6);
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+ else
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+ drvdata->cfg &= ~BIT(6);
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+
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+ if ((drvdata->mode & ETM_MODE_VMID) && (drvdata->vmid_size))
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|
|
+ drvdata->cfg |= BIT(7);
|
|
|
|
+ else
|
|
|
|
+ drvdata->cfg &= ~BIT(7);
|
|
|
|
+
|
|
|
|
+ /* bits[10:8], Conditional instruction tracing bit */
|
|
|
|
+ mode = ETM_MODE_COND(drvdata->mode);
|
|
|
|
+ if (drvdata->trccond == true) {
|
|
|
|
+ drvdata->cfg &= ~(BIT(8) | BIT(9) | BIT(10));
|
|
|
|
+ drvdata->cfg |= mode << 8;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* bit[11], Global timestamp tracing bit */
|
|
|
|
+ if ((drvdata->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size))
|
|
|
|
+ drvdata->cfg |= BIT(11);
|
|
|
|
+ else
|
|
|
|
+ drvdata->cfg &= ~BIT(11);
|
|
|
|
+
|
|
|
|
+ /* bit[12], Return stack enable bit */
|
|
|
|
+ if ((drvdata->mode & ETM_MODE_RETURNSTACK) &&
|
|
|
|
+ (drvdata->retstack == true))
|
|
|
|
+ drvdata->cfg |= BIT(12);
|
|
|
|
+ else
|
|
|
|
+ drvdata->cfg &= ~BIT(12);
|
|
|
|
+
|
|
|
|
+ /* bits[14:13], Q element enable field */
|
|
|
|
+ mode = ETM_MODE_QELEM(drvdata->mode);
|
|
|
|
+ /* start by clearing QE bits */
|
|
|
|
+ drvdata->cfg &= ~(BIT(13) | BIT(14));
|
|
|
|
+ /* if supported, Q elements with instruction counts are enabled */
|
|
|
|
+ if ((mode & BIT(0)) && (drvdata->q_support & BIT(0)))
|
|
|
|
+ drvdata->cfg |= BIT(13);
|
|
|
|
+ /*
|
|
|
|
+ * if supported, Q elements with and without instruction
|
|
|
|
+ * counts are enabled
|
|
|
|
+ */
|
|
|
|
+ if ((mode & BIT(1)) && (drvdata->q_support & BIT(1)))
|
|
|
|
+ drvdata->cfg |= BIT(14);
|
|
|
|
+
|
|
|
|
+ /* bit[11], AMBA Trace Bus (ATB) trigger enable bit */
|
|
|
|
+ if ((drvdata->mode & ETM_MODE_ATB_TRIGGER) &&
|
|
|
|
+ (drvdata->atbtrig == true))
|
|
|
|
+ drvdata->eventctrl1 |= BIT(11);
|
|
|
|
+ else
|
|
|
|
+ drvdata->eventctrl1 &= ~BIT(11);
|
|
|
|
+
|
|
|
|
+ /* bit[12], Low-power state behavior override bit */
|
|
|
|
+ if ((drvdata->mode & ETM_MODE_LPOVERRIDE) &&
|
|
|
|
+ (drvdata->lpoverride == true))
|
|
|
|
+ drvdata->eventctrl1 |= BIT(12);
|
|
|
|
+ else
|
|
|
|
+ drvdata->eventctrl1 &= ~BIT(12);
|
|
|
|
+
|
|
|
|
+ /* bit[8], Instruction stall bit */
|
|
|
|
+ if (drvdata->mode & ETM_MODE_ISTALL_EN)
|
|
|
|
+ drvdata->stall_ctrl |= BIT(8);
|
|
|
|
+ else
|
|
|
|
+ drvdata->stall_ctrl &= ~BIT(8);
|
|
|
|
+
|
|
|
|
+ /* bit[10], Prioritize instruction trace bit */
|
|
|
|
+ if (drvdata->mode & ETM_MODE_INSTPRIO)
|
|
|
|
+ drvdata->stall_ctrl |= BIT(10);
|
|
|
|
+ else
|
|
|
|
+ drvdata->stall_ctrl &= ~BIT(10);
|
|
|
|
+
|
|
|
|
+ /* bit[13], Trace overflow prevention bit */
|
|
|
|
+ if ((drvdata->mode & ETM_MODE_NOOVERFLOW) &&
|
|
|
|
+ (drvdata->nooverflow == true))
|
|
|
|
+ drvdata->stall_ctrl |= BIT(13);
|
|
|
|
+ else
|
|
|
|
+ drvdata->stall_ctrl &= ~BIT(13);
|
|
|
|
+
|
|
|
|
+ /* bit[9] Start/stop logic control bit */
|
|
|
|
+ if (drvdata->mode & ETM_MODE_VIEWINST_STARTSTOP)
|
|
|
|
+ drvdata->vinst_ctrl |= BIT(9);
|
|
|
|
+ else
|
|
|
|
+ drvdata->vinst_ctrl &= ~BIT(9);
|
|
|
|
+
|
|
|
|
+ /* bit[10], Whether a trace unit must trace a Reset exception */
|
|
|
|
+ if (drvdata->mode & ETM_MODE_TRACE_RESET)
|
|
|
|
+ drvdata->vinst_ctrl |= BIT(10);
|
|
|
|
+ else
|
|
|
|
+ drvdata->vinst_ctrl &= ~BIT(10);
|
|
|
|
+
|
|
|
|
+ /* bit[11], Whether a trace unit must trace a system error exception */
|
|
|
|
+ if ((drvdata->mode & ETM_MODE_TRACE_ERR) &&
|
|
|
|
+ (drvdata->trc_error == true))
|
|
|
|
+ drvdata->vinst_ctrl |= BIT(11);
|
|
|
|
+ else
|
|
|
|
+ drvdata->vinst_ctrl &= ~BIT(11);
|
|
|
|
+
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(mode);
|
|
|
|
+
|
|
|
|
+static ssize_t pe_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->pe_sel;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t pe_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ if (val > drvdata->nr_pe) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ drvdata->pe_sel = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(pe);
|
|
|
|
+
|
|
|
|
+static ssize_t event_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->eventctrl0;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t event_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ switch (drvdata->nr_event) {
|
|
|
|
+ case 0x0:
|
|
|
|
+ /* EVENT0, bits[7:0] */
|
|
|
|
+ drvdata->eventctrl0 = val & 0xFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x1:
|
|
|
|
+ /* EVENT1, bits[15:8] */
|
|
|
|
+ drvdata->eventctrl0 = val & 0xFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x2:
|
|
|
|
+ /* EVENT2, bits[23:16] */
|
|
|
|
+ drvdata->eventctrl0 = val & 0xFFFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x3:
|
|
|
|
+ /* EVENT3, bits[31:24] */
|
|
|
|
+ drvdata->eventctrl0 = val;
|
|
|
|
+ break;
|
|
|
|
+ default:
|
|
|
|
+ break;
|
|
|
|
+ }
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(event);
|
|
|
|
+
|
|
|
|
+static ssize_t event_instren_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = BMVAL(drvdata->eventctrl1, 0, 3);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t event_instren_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ /* start by clearing all instruction event enable bits */
|
|
|
|
+ drvdata->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3));
|
|
|
|
+ switch (drvdata->nr_event) {
|
|
|
|
+ case 0x0:
|
|
|
|
+ /* generate Event element for event 1 */
|
|
|
|
+ drvdata->eventctrl1 |= val & BIT(1);
|
|
|
|
+ break;
|
|
|
|
+ case 0x1:
|
|
|
|
+ /* generate Event element for event 1 and 2 */
|
|
|
|
+ drvdata->eventctrl1 |= val & (BIT(0) | BIT(1));
|
|
|
|
+ break;
|
|
|
|
+ case 0x2:
|
|
|
|
+ /* generate Event element for event 1, 2 and 3 */
|
|
|
|
+ drvdata->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2));
|
|
|
|
+ break;
|
|
|
|
+ case 0x3:
|
|
|
|
+ /* generate Event element for all 4 events */
|
|
|
|
+ drvdata->eventctrl1 |= val & 0xF;
|
|
|
|
+ break;
|
|
|
|
+ default:
|
|
|
|
+ break;
|
|
|
|
+ }
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(event_instren);
|
|
|
|
+
|
|
|
|
+static ssize_t event_ts_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->ts_ctrl;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t event_ts_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (!drvdata->ts_size)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ drvdata->ts_ctrl = val & ETMv4_EVENT_MASK;
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(event_ts);
|
|
|
|
+
|
|
|
|
+static ssize_t syncfreq_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->syncfreq;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t syncfreq_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (drvdata->syncpr == true)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ drvdata->syncfreq = val & ETMv4_SYNC_MASK;
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(syncfreq);
|
|
|
|
+
|
|
|
|
+static ssize_t cyc_threshold_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->ccctlr;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t cyc_threshold_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val < drvdata->ccitmin)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ drvdata->ccctlr = val & ETM_CYC_THRESHOLD_MASK;
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(cyc_threshold);
|
|
|
|
+
|
|
|
|
+static ssize_t bb_ctrl_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->bb_ctrl;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t bb_ctrl_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (drvdata->trcbb == false)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (!drvdata->nr_addr_cmp)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ /*
|
|
|
|
+ * Bit[7:0] selects which address range comparator is used for
|
|
|
|
+ * branch broadcast control.
|
|
|
|
+ */
|
|
|
|
+ if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ drvdata->bb_ctrl = val;
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(bb_ctrl);
|
|
|
|
+
|
|
|
|
+static ssize_t event_vinst_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->vinst_ctrl & ETMv4_EVENT_MASK;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t event_vinst_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ val &= ETMv4_EVENT_MASK;
|
|
|
|
+ drvdata->vinst_ctrl &= ~ETMv4_EVENT_MASK;
|
|
|
|
+ drvdata->vinst_ctrl |= val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(event_vinst);
|
|
|
|
+
|
|
|
|
+static ssize_t s_exlevel_vinst_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = BMVAL(drvdata->vinst_ctrl, 16, 19);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t s_exlevel_vinst_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ /* clear all EXLEVEL_S bits (bit[18] is never implemented) */
|
|
|
|
+ drvdata->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19));
|
|
|
|
+ /* enable instruction tracing for corresponding exception level */
|
|
|
|
+ val &= drvdata->s_ex_level;
|
|
|
|
+ drvdata->vinst_ctrl |= (val << 16);
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(s_exlevel_vinst);
|
|
|
|
+
|
|
|
|
+static ssize_t ns_exlevel_vinst_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ /* EXLEVEL_NS, bits[23:20] */
|
|
|
|
+ val = BMVAL(drvdata->vinst_ctrl, 20, 23);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t ns_exlevel_vinst_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ /* clear EXLEVEL_NS bits (bit[23] is never implemented */
|
|
|
|
+ drvdata->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22));
|
|
|
|
+ /* enable instruction tracing for corresponding exception level */
|
|
|
|
+ val &= drvdata->ns_ex_level;
|
|
|
|
+ drvdata->vinst_ctrl |= (val << 20);
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(ns_exlevel_vinst);
|
|
|
|
+
|
|
|
|
+static ssize_t addr_idx_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->addr_idx;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t addr_idx_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val >= drvdata->nr_addr_cmp * 2)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * Use spinlock to ensure index doesn't change while it gets
|
|
|
|
+ * dereferenced multiple times within a spinlock block elsewhere.
|
|
|
|
+ */
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ drvdata->addr_idx = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(addr_idx);
|
|
|
|
+
|
|
|
|
+static ssize_t addr_instdatatype_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ ssize_t len;
|
|
|
|
+ u8 val, idx;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ val = BMVAL(drvdata->addr_acc[idx], 0, 1);
|
|
|
|
+ len = scnprintf(buf, PAGE_SIZE, "%s\n",
|
|
|
|
+ val == ETM_INSTR_ADDR ? "instr" :
|
|
|
|
+ (val == ETM_DATA_LOAD_ADDR ? "data_load" :
|
|
|
|
+ (val == ETM_DATA_STORE_ADDR ? "data_store" :
|
|
|
|
+ "data_load_store")));
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return len;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t addr_instdatatype_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ char str[20] = "";
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (strlen(buf) >= 20)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (sscanf(buf, "%s", str) != 1)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ if (!strcmp(str, "instr"))
|
|
|
|
+ /* TYPE, bits[1:0] */
|
|
|
|
+ drvdata->addr_acc[idx] &= ~(BIT(0) | BIT(1));
|
|
|
|
+
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(addr_instdatatype);
|
|
|
|
+
|
|
|
|
+static ssize_t addr_single_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
|
|
|
|
+ drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+ val = (unsigned long)drvdata->addr_val[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t addr_single_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
|
|
|
|
+ drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ drvdata->addr_val[idx] = (u64)val;
|
|
|
|
+ drvdata->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(addr_single);
|
|
|
|
+
|
|
|
|
+static ssize_t addr_range_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val1, val2;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ if (idx % 2 != 0) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+ if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
|
|
|
|
+ drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
|
|
|
|
+ (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
|
|
|
|
+ drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ val1 = (unsigned long)drvdata->addr_val[idx];
|
|
|
|
+ val2 = (unsigned long)drvdata->addr_val[idx + 1];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t addr_range_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val1, val2;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ /* lower address comparator cannot have a higher address value */
|
|
|
|
+ if (val1 > val2)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ if (idx % 2 != 0) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
|
|
|
|
+ drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
|
|
|
|
+ (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
|
|
|
|
+ drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ drvdata->addr_val[idx] = (u64)val1;
|
|
|
|
+ drvdata->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
|
|
|
|
+ drvdata->addr_val[idx + 1] = (u64)val2;
|
|
|
|
+ drvdata->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
|
|
|
|
+ /*
|
|
|
|
+ * Program include or exclude control bits for vinst or vdata
|
|
|
|
+ * whenever we change addr comparators to ETM_ADDR_TYPE_RANGE
|
|
|
|
+ */
|
|
|
|
+ if (drvdata->mode & ETM_MODE_EXCLUDE)
|
|
|
|
+ etm4_set_mode_exclude(drvdata, true);
|
|
|
|
+ else
|
|
|
|
+ etm4_set_mode_exclude(drvdata, false);
|
|
|
|
+
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(addr_range);
|
|
|
|
+
|
|
|
|
+static ssize_t addr_start_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+
|
|
|
|
+ if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
|
|
|
|
+ drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ val = (unsigned long)drvdata->addr_val[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t addr_start_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ if (!drvdata->nr_addr_cmp) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ }
|
|
|
|
+ if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
|
|
|
|
+ drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ drvdata->addr_val[idx] = (u64)val;
|
|
|
|
+ drvdata->addr_type[idx] = ETM_ADDR_TYPE_START;
|
|
|
|
+ drvdata->vissctlr |= BIT(idx);
|
|
|
|
+ /* SSSTATUS, bit[9] - turn on start/stop logic */
|
|
|
|
+ drvdata->vinst_ctrl |= BIT(9);
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(addr_start);
|
|
|
|
+
|
|
|
|
+static ssize_t addr_stop_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+
|
|
|
|
+ if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
|
|
|
|
+ drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ val = (unsigned long)drvdata->addr_val[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t addr_stop_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ if (!drvdata->nr_addr_cmp) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ }
|
|
|
|
+ if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
|
|
|
|
+ drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return -EPERM;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ drvdata->addr_val[idx] = (u64)val;
|
|
|
|
+ drvdata->addr_type[idx] = ETM_ADDR_TYPE_STOP;
|
|
|
|
+ drvdata->vissctlr |= BIT(idx + 16);
|
|
|
|
+ /* SSSTATUS, bit[9] - turn on start/stop logic */
|
|
|
|
+ drvdata->vinst_ctrl |= BIT(9);
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(addr_stop);
|
|
|
|
+
|
|
|
|
+static ssize_t addr_ctxtype_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ ssize_t len;
|
|
|
|
+ u8 idx, val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ /* CONTEXTTYPE, bits[3:2] */
|
|
|
|
+ val = BMVAL(drvdata->addr_acc[idx], 2, 3);
|
|
|
|
+ len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" :
|
|
|
|
+ (val == ETM_CTX_CTXID ? "ctxid" :
|
|
|
|
+ (val == ETM_CTX_VMID ? "vmid" : "all")));
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return len;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t addr_ctxtype_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ char str[10] = "";
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (strlen(buf) >= 10)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (sscanf(buf, "%s", str) != 1)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ if (!strcmp(str, "none"))
|
|
|
|
+ /* start by clearing context type bits */
|
|
|
|
+ drvdata->addr_acc[idx] &= ~(BIT(2) | BIT(3));
|
|
|
|
+ else if (!strcmp(str, "ctxid")) {
|
|
|
|
+ /* 0b01 The trace unit performs a Context ID */
|
|
|
|
+ if (drvdata->numcidc) {
|
|
|
|
+ drvdata->addr_acc[idx] |= BIT(2);
|
|
|
|
+ drvdata->addr_acc[idx] &= ~BIT(3);
|
|
|
|
+ }
|
|
|
|
+ } else if (!strcmp(str, "vmid")) {
|
|
|
|
+ /* 0b10 The trace unit performs a VMID */
|
|
|
|
+ if (drvdata->numvmidc) {
|
|
|
|
+ drvdata->addr_acc[idx] &= ~BIT(2);
|
|
|
|
+ drvdata->addr_acc[idx] |= BIT(3);
|
|
|
|
+ }
|
|
|
|
+ } else if (!strcmp(str, "all")) {
|
|
|
|
+ /*
|
|
|
|
+ * 0b11 The trace unit performs a Context ID
|
|
|
|
+ * comparison and a VMID
|
|
|
|
+ */
|
|
|
|
+ if (drvdata->numcidc)
|
|
|
|
+ drvdata->addr_acc[idx] |= BIT(2);
|
|
|
|
+ if (drvdata->numvmidc)
|
|
|
|
+ drvdata->addr_acc[idx] |= BIT(3);
|
|
|
|
+ }
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(addr_ctxtype);
|
|
|
|
+
|
|
|
|
+static ssize_t addr_context_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ /* context ID comparator bits[6:4] */
|
|
|
|
+ val = BMVAL(drvdata->addr_acc[idx], 4, 6);
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t addr_context_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val >= (drvdata->numcidc >= drvdata->numvmidc ?
|
|
|
|
+ drvdata->numcidc : drvdata->numvmidc))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->addr_idx;
|
|
|
|
+ /* clear context ID comparator bits[6:4] */
|
|
|
|
+ drvdata->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6));
|
|
|
|
+ drvdata->addr_acc[idx] |= (val << 4);
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(addr_context);
|
|
|
|
+
|
|
|
|
+static ssize_t seq_idx_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->seq_idx;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t seq_idx_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val >= drvdata->nrseqstate - 1)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * Use spinlock to ensure index doesn't change while it gets
|
|
|
|
+ * dereferenced multiple times within a spinlock block elsewhere.
|
|
|
|
+ */
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ drvdata->seq_idx = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(seq_idx);
|
|
|
|
+
|
|
|
|
+static ssize_t seq_state_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->seq_state;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t seq_state_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val >= drvdata->nrseqstate)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ drvdata->seq_state = val;
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(seq_state);
|
|
|
|
+
|
|
|
|
+static ssize_t seq_event_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->seq_idx;
|
|
|
|
+ val = drvdata->seq_ctrl[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t seq_event_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->seq_idx;
|
|
|
|
+ /* RST, bits[7:0] */
|
|
|
|
+ drvdata->seq_ctrl[idx] = val & 0xFF;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(seq_event);
|
|
|
|
+
|
|
|
|
+static ssize_t seq_reset_event_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->seq_rst;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t seq_reset_event_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (!(drvdata->nrseqstate))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ drvdata->seq_rst = val & ETMv4_EVENT_MASK;
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(seq_reset_event);
|
|
|
|
+
|
|
|
|
+static ssize_t cntr_idx_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->cntr_idx;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t cntr_idx_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val >= drvdata->nr_cntr)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * Use spinlock to ensure index doesn't change while it gets
|
|
|
|
+ * dereferenced multiple times within a spinlock block elsewhere.
|
|
|
|
+ */
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ drvdata->cntr_idx = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(cntr_idx);
|
|
|
|
+
|
|
|
|
+static ssize_t cntrldvr_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->cntr_idx;
|
|
|
|
+ val = drvdata->cntrldvr[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t cntrldvr_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val > ETM_CNTR_MAX_VAL)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->cntr_idx;
|
|
|
|
+ drvdata->cntrldvr[idx] = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(cntrldvr);
|
|
|
|
+
|
|
|
|
+static ssize_t cntr_val_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->cntr_idx;
|
|
|
|
+ val = drvdata->cntr_val[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t cntr_val_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val > ETM_CNTR_MAX_VAL)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->cntr_idx;
|
|
|
|
+ drvdata->cntr_val[idx] = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(cntr_val);
|
|
|
|
+
|
|
|
|
+static ssize_t cntr_ctrl_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->cntr_idx;
|
|
|
|
+ val = drvdata->cntr_ctrl[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t cntr_ctrl_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->cntr_idx;
|
|
|
|
+ drvdata->cntr_ctrl[idx] = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(cntr_ctrl);
|
|
|
|
+
|
|
|
|
+static ssize_t res_idx_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->res_idx;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t res_idx_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ /* Resource selector pair 0 is always implemented and reserved */
|
|
|
|
+ if ((val == 0) || (val >= drvdata->nr_resource))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * Use spinlock to ensure index doesn't change while it gets
|
|
|
|
+ * dereferenced multiple times within a spinlock block elsewhere.
|
|
|
|
+ */
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ drvdata->res_idx = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(res_idx);
|
|
|
|
+
|
|
|
|
+static ssize_t res_ctrl_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->res_idx;
|
|
|
|
+ val = drvdata->res_ctrl[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t res_ctrl_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->res_idx;
|
|
|
|
+ /* For odd idx pair inversal bit is RES0 */
|
|
|
|
+ if (idx % 2 != 0)
|
|
|
|
+ /* PAIRINV, bit[21] */
|
|
|
|
+ val &= ~BIT(21);
|
|
|
|
+ drvdata->res_ctrl[idx] = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(res_ctrl);
|
|
|
|
+
|
|
|
|
+static ssize_t ctxid_idx_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->ctxid_idx;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t ctxid_idx_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val >= drvdata->numcidc)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * Use spinlock to ensure index doesn't change while it gets
|
|
|
|
+ * dereferenced multiple times within a spinlock block elsewhere.
|
|
|
|
+ */
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ drvdata->ctxid_idx = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(ctxid_idx);
|
|
|
|
+
|
|
|
|
+static ssize_t ctxid_pid_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->ctxid_idx;
|
|
|
|
+ val = (unsigned long)drvdata->ctxid_vpid[idx];
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t ctxid_pid_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 idx;
|
|
|
|
+ unsigned long vpid, pid;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * only implemented when ctxid tracing is enabled, i.e. at least one
|
|
|
|
+ * ctxid comparator is implemented and ctxid is greater than 0 bits
|
|
|
|
+ * in length
|
|
|
|
+ */
|
|
|
|
+ if (!drvdata->ctxid_size || !drvdata->numcidc)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (kstrtoul(buf, 16, &vpid))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ pid = coresight_vpid_to_pid(vpid);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ idx = drvdata->ctxid_idx;
|
|
|
|
+ drvdata->ctxid_pid[idx] = (u64)pid;
|
|
|
|
+ drvdata->ctxid_vpid[idx] = (u64)vpid;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(ctxid_pid);
|
|
|
|
+
|
|
|
|
+static ssize_t ctxid_masks_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val1, val2;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ val1 = drvdata->ctxid_mask0;
|
|
|
|
+ val2 = drvdata->ctxid_mask1;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t ctxid_masks_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 i, j, maskbyte;
|
|
|
|
+ unsigned long val1, val2, mask;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * only implemented when ctxid tracing is enabled, i.e. at least one
|
|
|
|
+ * ctxid comparator is implemented and ctxid is greater than 0 bits
|
|
|
|
+ * in length
|
|
|
|
+ */
|
|
|
|
+ if (!drvdata->ctxid_size || !drvdata->numcidc)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ /*
|
|
|
|
+ * each byte[0..3] controls mask value applied to ctxid
|
|
|
|
+ * comparator[0..3]
|
|
|
|
+ */
|
|
|
|
+ switch (drvdata->numcidc) {
|
|
|
|
+ case 0x1:
|
|
|
|
+ /* COMP0, bits[7:0] */
|
|
|
|
+ drvdata->ctxid_mask0 = val1 & 0xFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x2:
|
|
|
|
+ /* COMP1, bits[15:8] */
|
|
|
|
+ drvdata->ctxid_mask0 = val1 & 0xFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x3:
|
|
|
|
+ /* COMP2, bits[23:16] */
|
|
|
|
+ drvdata->ctxid_mask0 = val1 & 0xFFFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x4:
|
|
|
|
+ /* COMP3, bits[31:24] */
|
|
|
|
+ drvdata->ctxid_mask0 = val1;
|
|
|
|
+ break;
|
|
|
|
+ case 0x5:
|
|
|
|
+ /* COMP4, bits[7:0] */
|
|
|
|
+ drvdata->ctxid_mask0 = val1;
|
|
|
|
+ drvdata->ctxid_mask1 = val2 & 0xFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x6:
|
|
|
|
+ /* COMP5, bits[15:8] */
|
|
|
|
+ drvdata->ctxid_mask0 = val1;
|
|
|
|
+ drvdata->ctxid_mask1 = val2 & 0xFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x7:
|
|
|
|
+ /* COMP6, bits[23:16] */
|
|
|
|
+ drvdata->ctxid_mask0 = val1;
|
|
|
|
+ drvdata->ctxid_mask1 = val2 & 0xFFFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x8:
|
|
|
|
+ /* COMP7, bits[31:24] */
|
|
|
|
+ drvdata->ctxid_mask0 = val1;
|
|
|
|
+ drvdata->ctxid_mask1 = val2;
|
|
|
|
+ break;
|
|
|
|
+ default:
|
|
|
|
+ break;
|
|
|
|
+ }
|
|
|
|
+ /*
|
|
|
|
+ * If software sets a mask bit to 1, it must program relevant byte
|
|
|
|
+ * of ctxid comparator value 0x0, otherwise behavior is unpredictable.
|
|
|
|
+ * For example, if bit[3] of ctxid_mask0 is 1, we must clear bits[31:24]
|
|
|
|
+ * of ctxid comparator0 value (corresponding to byte 0) register.
|
|
|
|
+ */
|
|
|
|
+ mask = drvdata->ctxid_mask0;
|
|
|
|
+ for (i = 0; i < drvdata->numcidc; i++) {
|
|
|
|
+ /* mask value of corresponding ctxid comparator */
|
|
|
|
+ maskbyte = mask & ETMv4_EVENT_MASK;
|
|
|
|
+ /*
|
|
|
|
+ * each bit corresponds to a byte of respective ctxid comparator
|
|
|
|
+ * value register
|
|
|
|
+ */
|
|
|
|
+ for (j = 0; j < 8; j++) {
|
|
|
|
+ if (maskbyte & 1)
|
|
|
|
+ drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8));
|
|
|
|
+ maskbyte >>= 1;
|
|
|
|
+ }
|
|
|
|
+ /* Select the next ctxid comparator mask value */
|
|
|
|
+ if (i == 3)
|
|
|
|
+ /* ctxid comparators[4-7] */
|
|
|
|
+ mask = drvdata->ctxid_mask1;
|
|
|
|
+ else
|
|
|
|
+ mask >>= 0x8;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(ctxid_masks);
|
|
|
|
+
|
|
|
|
+static ssize_t vmid_idx_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->vmid_idx;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t vmid_idx_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (val >= drvdata->numvmidc)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * Use spinlock to ensure index doesn't change while it gets
|
|
|
|
+ * dereferenced multiple times within a spinlock block elsewhere.
|
|
|
|
+ */
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ drvdata->vmid_idx = val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(vmid_idx);
|
|
|
|
+
|
|
|
|
+static ssize_t vmid_val_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = (unsigned long)drvdata->vmid_val[drvdata->vmid_idx];
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t vmid_val_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ unsigned long val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * only implemented when vmid tracing is enabled, i.e. at least one
|
|
|
|
+ * vmid comparator is implemented and at least 8 bit vmid size
|
|
|
|
+ */
|
|
|
|
+ if (!drvdata->vmid_size || !drvdata->numvmidc)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (kstrtoul(buf, 16, &val))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ drvdata->vmid_val[drvdata->vmid_idx] = (u64)val;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(vmid_val);
|
|
|
|
+
|
|
|
|
+static ssize_t vmid_masks_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr, char *buf)
|
|
|
|
+{
|
|
|
|
+ unsigned long val1, val2;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+ val1 = drvdata->vmid_mask0;
|
|
|
|
+ val2 = drvdata->vmid_mask1;
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static ssize_t vmid_masks_store(struct device *dev,
|
|
|
|
+ struct device_attribute *attr,
|
|
|
|
+ const char *buf, size_t size)
|
|
|
|
+{
|
|
|
|
+ u8 i, j, maskbyte;
|
|
|
|
+ unsigned long val1, val2, mask;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+ /*
|
|
|
|
+ * only implemented when vmid tracing is enabled, i.e. at least one
|
|
|
|
+ * vmid comparator is implemented and at least 8 bit vmid size
|
|
|
|
+ */
|
|
|
|
+ if (!drvdata->vmid_size || !drvdata->numvmidc)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ spin_lock(&drvdata->spinlock);
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * each byte[0..3] controls mask value applied to vmid
|
|
|
|
+ * comparator[0..3]
|
|
|
|
+ */
|
|
|
|
+ switch (drvdata->numvmidc) {
|
|
|
|
+ case 0x1:
|
|
|
|
+ /* COMP0, bits[7:0] */
|
|
|
|
+ drvdata->vmid_mask0 = val1 & 0xFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x2:
|
|
|
|
+ /* COMP1, bits[15:8] */
|
|
|
|
+ drvdata->vmid_mask0 = val1 & 0xFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x3:
|
|
|
|
+ /* COMP2, bits[23:16] */
|
|
|
|
+ drvdata->vmid_mask0 = val1 & 0xFFFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x4:
|
|
|
|
+ /* COMP3, bits[31:24] */
|
|
|
|
+ drvdata->vmid_mask0 = val1;
|
|
|
|
+ break;
|
|
|
|
+ case 0x5:
|
|
|
|
+ /* COMP4, bits[7:0] */
|
|
|
|
+ drvdata->vmid_mask0 = val1;
|
|
|
|
+ drvdata->vmid_mask1 = val2 & 0xFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x6:
|
|
|
|
+ /* COMP5, bits[15:8] */
|
|
|
|
+ drvdata->vmid_mask0 = val1;
|
|
|
|
+ drvdata->vmid_mask1 = val2 & 0xFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x7:
|
|
|
|
+ /* COMP6, bits[23:16] */
|
|
|
|
+ drvdata->vmid_mask0 = val1;
|
|
|
|
+ drvdata->vmid_mask1 = val2 & 0xFFFFFF;
|
|
|
|
+ break;
|
|
|
|
+ case 0x8:
|
|
|
|
+ /* COMP7, bits[31:24] */
|
|
|
|
+ drvdata->vmid_mask0 = val1;
|
|
|
|
+ drvdata->vmid_mask1 = val2;
|
|
|
|
+ break;
|
|
|
|
+ default:
|
|
|
|
+ break;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * If software sets a mask bit to 1, it must program relevant byte
|
|
|
|
+ * of vmid comparator value 0x0, otherwise behavior is unpredictable.
|
|
|
|
+ * For example, if bit[3] of vmid_mask0 is 1, we must clear bits[31:24]
|
|
|
|
+ * of vmid comparator0 value (corresponding to byte 0) register.
|
|
|
|
+ */
|
|
|
|
+ mask = drvdata->vmid_mask0;
|
|
|
|
+ for (i = 0; i < drvdata->numvmidc; i++) {
|
|
|
|
+ /* mask value of corresponding vmid comparator */
|
|
|
|
+ maskbyte = mask & ETMv4_EVENT_MASK;
|
|
|
|
+ /*
|
|
|
|
+ * each bit corresponds to a byte of respective vmid comparator
|
|
|
|
+ * value register
|
|
|
|
+ */
|
|
|
|
+ for (j = 0; j < 8; j++) {
|
|
|
|
+ if (maskbyte & 1)
|
|
|
|
+ drvdata->vmid_val[i] &= ~(0xFF << (j * 8));
|
|
|
|
+ maskbyte >>= 1;
|
|
|
|
+ }
|
|
|
|
+ /* Select the next vmid comparator mask value */
|
|
|
|
+ if (i == 3)
|
|
|
|
+ /* vmid comparators[4-7] */
|
|
|
|
+ mask = drvdata->vmid_mask1;
|
|
|
|
+ else
|
|
|
|
+ mask >>= 0x8;
|
|
|
|
+ }
|
|
|
|
+ spin_unlock(&drvdata->spinlock);
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RW(vmid_masks);
|
|
|
|
+
|
|
|
|
+static ssize_t cpu_show(struct device *dev,
|
|
|
|
+ struct device_attribute *attr, char *buf)
|
|
|
|
+{
|
|
|
|
+ int val;
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
+
|
|
|
|
+ val = drvdata->cpu;
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "%d\n", val);
|
|
|
|
+
|
|
|
|
+}
|
|
|
|
+static DEVICE_ATTR_RO(cpu);
|
|
|
|
+
|
|
|
|
+static struct attribute *coresight_etmv4_attrs[] = {
|
|
|
|
+ &dev_attr_nr_pe_cmp.attr,
|
|
|
|
+ &dev_attr_nr_addr_cmp.attr,
|
|
|
|
+ &dev_attr_nr_cntr.attr,
|
|
|
|
+ &dev_attr_nr_ext_inp.attr,
|
|
|
|
+ &dev_attr_numcidc.attr,
|
|
|
|
+ &dev_attr_numvmidc.attr,
|
|
|
|
+ &dev_attr_nrseqstate.attr,
|
|
|
|
+ &dev_attr_nr_resource.attr,
|
|
|
|
+ &dev_attr_nr_ss_cmp.attr,
|
|
|
|
+ &dev_attr_reset.attr,
|
|
|
|
+ &dev_attr_mode.attr,
|
|
|
|
+ &dev_attr_pe.attr,
|
|
|
|
+ &dev_attr_event.attr,
|
|
|
|
+ &dev_attr_event_instren.attr,
|
|
|
|
+ &dev_attr_event_ts.attr,
|
|
|
|
+ &dev_attr_syncfreq.attr,
|
|
|
|
+ &dev_attr_cyc_threshold.attr,
|
|
|
|
+ &dev_attr_bb_ctrl.attr,
|
|
|
|
+ &dev_attr_event_vinst.attr,
|
|
|
|
+ &dev_attr_s_exlevel_vinst.attr,
|
|
|
|
+ &dev_attr_ns_exlevel_vinst.attr,
|
|
|
|
+ &dev_attr_addr_idx.attr,
|
|
|
|
+ &dev_attr_addr_instdatatype.attr,
|
|
|
|
+ &dev_attr_addr_single.attr,
|
|
|
|
+ &dev_attr_addr_range.attr,
|
|
|
|
+ &dev_attr_addr_start.attr,
|
|
|
|
+ &dev_attr_addr_stop.attr,
|
|
|
|
+ &dev_attr_addr_ctxtype.attr,
|
|
|
|
+ &dev_attr_addr_context.attr,
|
|
|
|
+ &dev_attr_seq_idx.attr,
|
|
|
|
+ &dev_attr_seq_state.attr,
|
|
|
|
+ &dev_attr_seq_event.attr,
|
|
|
|
+ &dev_attr_seq_reset_event.attr,
|
|
|
|
+ &dev_attr_cntr_idx.attr,
|
|
|
|
+ &dev_attr_cntrldvr.attr,
|
|
|
|
+ &dev_attr_cntr_val.attr,
|
|
|
|
+ &dev_attr_cntr_ctrl.attr,
|
|
|
|
+ &dev_attr_res_idx.attr,
|
|
|
|
+ &dev_attr_res_ctrl.attr,
|
|
|
|
+ &dev_attr_ctxid_idx.attr,
|
|
|
|
+ &dev_attr_ctxid_pid.attr,
|
|
|
|
+ &dev_attr_ctxid_masks.attr,
|
|
|
|
+ &dev_attr_vmid_idx.attr,
|
|
|
|
+ &dev_attr_vmid_val.attr,
|
|
|
|
+ &dev_attr_vmid_masks.attr,
|
|
|
|
+ &dev_attr_cpu.attr,
|
|
|
|
+ NULL,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+#define coresight_simple_func(name, offset) \
|
|
|
|
+static ssize_t name##_show(struct device *_dev, \
|
|
|
|
+ struct device_attribute *attr, char *buf) \
|
|
|
|
+{ \
|
|
|
|
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(_dev->parent); \
|
|
|
|
+ return scnprintf(buf, PAGE_SIZE, "0x%x\n", \
|
|
|
|
+ readl_relaxed(drvdata->base + offset)); \
|
|
|
|
+} \
|
|
|
|
+DEVICE_ATTR_RO(name)
|
|
|
|
+
|
|
|
|
+coresight_simple_func(trcoslsr, TRCOSLSR);
|
|
|
|
+coresight_simple_func(trcpdcr, TRCPDCR);
|
|
|
|
+coresight_simple_func(trcpdsr, TRCPDSR);
|
|
|
|
+coresight_simple_func(trclsr, TRCLSR);
|
|
|
|
+coresight_simple_func(trcauthstatus, TRCAUTHSTATUS);
|
|
|
|
+coresight_simple_func(trcdevid, TRCDEVID);
|
|
|
|
+coresight_simple_func(trcdevtype, TRCDEVTYPE);
|
|
|
|
+coresight_simple_func(trcpidr0, TRCPIDR0);
|
|
|
|
+coresight_simple_func(trcpidr1, TRCPIDR1);
|
|
|
|
+coresight_simple_func(trcpidr2, TRCPIDR2);
|
|
|
|
+coresight_simple_func(trcpidr3, TRCPIDR3);
|
|
|
|
+
|
|
|
|
+static struct attribute *coresight_etmv4_mgmt_attrs[] = {
|
|
|
|
+ &dev_attr_trcoslsr.attr,
|
|
|
|
+ &dev_attr_trcpdcr.attr,
|
|
|
|
+ &dev_attr_trcpdsr.attr,
|
|
|
|
+ &dev_attr_trclsr.attr,
|
|
|
|
+ &dev_attr_trcauthstatus.attr,
|
|
|
|
+ &dev_attr_trcdevid.attr,
|
|
|
|
+ &dev_attr_trcdevtype.attr,
|
|
|
|
+ &dev_attr_trcpidr0.attr,
|
|
|
|
+ &dev_attr_trcpidr1.attr,
|
|
|
|
+ &dev_attr_trcpidr2.attr,
|
|
|
|
+ &dev_attr_trcpidr3.attr,
|
|
|
|
+ NULL,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+coresight_simple_func(trcidr0, TRCIDR0);
|
|
|
|
+coresight_simple_func(trcidr1, TRCIDR1);
|
|
|
|
+coresight_simple_func(trcidr2, TRCIDR2);
|
|
|
|
+coresight_simple_func(trcidr3, TRCIDR3);
|
|
|
|
+coresight_simple_func(trcidr4, TRCIDR4);
|
|
|
|
+coresight_simple_func(trcidr5, TRCIDR5);
|
|
|
|
+/* trcidr[6,7] are reserved */
|
|
|
|
+coresight_simple_func(trcidr8, TRCIDR8);
|
|
|
|
+coresight_simple_func(trcidr9, TRCIDR9);
|
|
|
|
+coresight_simple_func(trcidr10, TRCIDR10);
|
|
|
|
+coresight_simple_func(trcidr11, TRCIDR11);
|
|
|
|
+coresight_simple_func(trcidr12, TRCIDR12);
|
|
|
|
+coresight_simple_func(trcidr13, TRCIDR13);
|
|
|
|
+
|
|
|
|
+static struct attribute *coresight_etmv4_trcidr_attrs[] = {
|
|
|
|
+ &dev_attr_trcidr0.attr,
|
|
|
|
+ &dev_attr_trcidr1.attr,
|
|
|
|
+ &dev_attr_trcidr2.attr,
|
|
|
|
+ &dev_attr_trcidr3.attr,
|
|
|
|
+ &dev_attr_trcidr4.attr,
|
|
|
|
+ &dev_attr_trcidr5.attr,
|
|
|
|
+ /* trcidr[6,7] are reserved */
|
|
|
|
+ &dev_attr_trcidr8.attr,
|
|
|
|
+ &dev_attr_trcidr9.attr,
|
|
|
|
+ &dev_attr_trcidr10.attr,
|
|
|
|
+ &dev_attr_trcidr11.attr,
|
|
|
|
+ &dev_attr_trcidr12.attr,
|
|
|
|
+ &dev_attr_trcidr13.attr,
|
|
|
|
+ NULL,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static const struct attribute_group coresight_etmv4_group = {
|
|
|
|
+ .attrs = coresight_etmv4_attrs,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static const struct attribute_group coresight_etmv4_mgmt_group = {
|
|
|
|
+ .attrs = coresight_etmv4_mgmt_attrs,
|
|
|
|
+ .name = "mgmt",
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static const struct attribute_group coresight_etmv4_trcidr_group = {
|
|
|
|
+ .attrs = coresight_etmv4_trcidr_attrs,
|
|
|
|
+ .name = "trcidr",
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+const struct attribute_group *coresight_etmv4_groups[] = {
|
|
|
|
+ &coresight_etmv4_group,
|
|
|
|
+ &coresight_etmv4_mgmt_group,
|
|
|
|
+ &coresight_etmv4_trcidr_group,
|
|
|
|
+ NULL,
|
|
|
|
+};
|