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@@ -12,6 +12,7 @@ for the Thermal Controller which holds a phandle to the AUXADC.
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Required properties:
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- compatible: Should be one of:
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- "mediatek,mt2701-auxadc": For MT2701 family of SoCs
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+ - "mediatek,mt7622-auxadc": For MT7622 family of SoCs
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- "mediatek,mt8173-auxadc": For MT8173 family of SoCs
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- reg: Address range of the AUXADC unit.
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- clocks: Should contain a clock specifier for each entry in clock-names
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