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@@ -0,0 +1,475 @@
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+/*
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+ * cxgb4_ptp.c:Chelsio PTP support for T5/T6
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+ *
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+ * Copyright (c) 2003-2017 Chelsio Communications, Inc. All rights reserved.
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+ *
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+ * This software is available to you under a choice of one of two
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+ * licenses. You may choose to be licensed under the terms of the GNU
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+ * General Public License (GPL) Version 2, available from the file
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+ * COPYING in the main directory of this source tree, or the
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+ * OpenIB.org BSD license below:
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+ *
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+ * Redistribution and use in source and binary forms, with or
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+ * without modification, are permitted provided that the following
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+ * conditions are met:
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+ *
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+ * - Redistributions of source code must retain the above
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+ * copyright notice, this list of conditions and the following
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+ * disclaimer.
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+ *
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+ * - Redistributions in binary form must reproduce the above
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+ * copyright notice, this list of conditions and the following
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+ * disclaimer in the documentation and/or other materials
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+ * provided with the distribution.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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+ * SOFTWARE.
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+ *
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+ * Written by: Atul Gupta (atul.gupta@chelsio.com)
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/net_tstamp.h>
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+#include <linux/skbuff.h>
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+#include <linux/netdevice.h>
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+#include <linux/pps_kernel.h>
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+#include <linux/ptp_clock_kernel.h>
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+#include <linux/ptp_classify.h>
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+#include <linux/udp.h>
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+
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+#include "cxgb4.h"
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+#include "t4_hw.h"
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+#include "t4_regs.h"
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+#include "t4_msg.h"
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+#include "t4fw_api.h"
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+#include "cxgb4_ptp.h"
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+
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+/**
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+ * cxgb4_ptp_is_ptp_tx - determine whether TX packet is PTP or not
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+ * @skb: skb of outgoing ptp request
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+ *
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+ */
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+bool cxgb4_ptp_is_ptp_tx(struct sk_buff *skb)
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+{
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+ struct udphdr *uh;
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+
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+ uh = udp_hdr(skb);
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+ return skb->len >= PTP_MIN_LENGTH &&
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+ skb->len <= PTP_IN_TRANSMIT_PACKET_MAXNUM &&
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+ likely(skb->protocol == htons(ETH_P_IP)) &&
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+ ip_hdr(skb)->protocol == IPPROTO_UDP &&
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+ uh->dest == htons(PTP_EVENT_PORT);
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+}
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+
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+bool is_ptp_enabled(struct sk_buff *skb, struct net_device *dev)
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+{
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+ struct port_info *pi;
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+
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+ pi = netdev_priv(dev);
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+ return (pi->ptp_enable && cxgb4_xmit_with_hwtstamp(skb) &&
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+ cxgb4_ptp_is_ptp_tx(skb));
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+}
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+
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+/**
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+ * cxgb4_ptp_is_ptp_rx - determine whether RX packet is PTP or not
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+ * @skb: skb of incoming ptp request
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+ *
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+ */
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+bool cxgb4_ptp_is_ptp_rx(struct sk_buff *skb)
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+{
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+ struct udphdr *uh = (struct udphdr *)(skb->data + ETH_HLEN +
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+ IPV4_HLEN(skb->data));
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+
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+ return uh->dest == htons(PTP_EVENT_PORT) &&
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+ uh->source == htons(PTP_EVENT_PORT);
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+}
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+
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+/**
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+ * cxgb4_ptp_read_hwstamp - read timestamp for TX event PTP message
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+ * @adapter: board private structure
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+ * @pi: port private structure
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+ *
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+ */
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+void cxgb4_ptp_read_hwstamp(struct adapter *adapter, struct port_info *pi)
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+{
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+ struct skb_shared_hwtstamps *skb_ts = NULL;
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+ u64 tx_ts;
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+
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+ skb_ts = skb_hwtstamps(adapter->ptp_tx_skb);
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+
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+ tx_ts = t4_read_reg(adapter,
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+ T5_PORT_REG(pi->port_id, MAC_PORT_TX_TS_VAL_LO));
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+
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+ tx_ts |= (u64)t4_read_reg(adapter,
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+ T5_PORT_REG(pi->port_id,
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+ MAC_PORT_TX_TS_VAL_HI)) << 32;
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+ skb_ts->hwtstamp = ns_to_ktime(tx_ts);
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+ skb_tstamp_tx(adapter->ptp_tx_skb, skb_ts);
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+ dev_kfree_skb_any(adapter->ptp_tx_skb);
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+ spin_lock(&adapter->ptp_lock);
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+ adapter->ptp_tx_skb = NULL;
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+ spin_unlock(&adapter->ptp_lock);
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+}
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+
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+/**
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+ * cxgb4_ptprx_timestamping - Enable Timestamp for RX PTP event message
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+ * @pi: port private structure
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+ * @port: pot number
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+ * @mode: RX mode
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+ *
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+ */
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+int cxgb4_ptprx_timestamping(struct port_info *pi, u8 port, u16 mode)
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+{
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+ struct adapter *adapter = pi->adapter;
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+ struct fw_ptp_cmd c;
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+ int err;
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+
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+ memset(&c, 0, sizeof(c));
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+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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+ FW_CMD_REQUEST_F |
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+ FW_CMD_WRITE_F |
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+ FW_PTP_CMD_PORTID_V(port));
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+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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+ c.u.init.sc = FW_PTP_SC_RXTIME_STAMP;
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+ c.u.init.mode = cpu_to_be16(mode);
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+
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+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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+ if (err < 0)
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+ dev_err(adapter->pdev_dev,
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+ "PTP: %s error %d\n", __func__, -err);
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+ return err;
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+}
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+
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+int cxgb4_ptp_txtype(struct adapter *adapter, u8 port)
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+{
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+ struct fw_ptp_cmd c;
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+ int err;
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+
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+ memset(&c, 0, sizeof(c));
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+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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+ FW_CMD_REQUEST_F |
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+ FW_CMD_WRITE_F |
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+ FW_PTP_CMD_PORTID_V(port));
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+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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+ c.u.init.sc = FW_PTP_SC_TX_TYPE;
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+ c.u.init.mode = cpu_to_be16(PTP_TS_NONE);
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+
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+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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+ if (err < 0)
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+ dev_err(adapter->pdev_dev,
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+ "PTP: %s error %d\n", __func__, -err);
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+
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+ return err;
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+}
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+
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+int cxgb4_ptp_redirect_rx_packet(struct adapter *adapter, struct port_info *pi)
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+{
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+ struct sge *s = &adapter->sge;
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+ struct sge_eth_rxq *receive_q = &s->ethrxq[pi->first_qset];
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+ struct fw_ptp_cmd c;
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+ int err;
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+
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+ memset(&c, 0, sizeof(c));
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+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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+ FW_CMD_REQUEST_F |
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+ FW_CMD_WRITE_F |
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+ FW_PTP_CMD_PORTID_V(pi->port_id));
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+
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+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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+ c.u.init.sc = FW_PTP_SC_RDRX_TYPE;
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+ c.u.init.txchan = pi->tx_chan;
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+ c.u.init.absid = cpu_to_be16(receive_q->rspq.abs_id);
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+
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+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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+ if (err < 0)
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+ dev_err(adapter->pdev_dev,
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+ "PTP: %s error %d\n", __func__, -err);
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+ return err;
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+}
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+
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+/**
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+ * @ptp: ptp clock structure
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+ * @ppb: Desired frequency change in parts per billion
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+ *
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+ * Adjust the frequency of the PHC cycle counter by the indicated ppb from
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+ * the base frequency.
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+ */
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+static int cxgb4_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
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+{
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+ struct adapter *adapter = (struct adapter *)container_of(ptp,
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+ struct adapter, ptp_clock_info);
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+ struct fw_ptp_cmd c;
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+ int err;
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+
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+ memset(&c, 0, sizeof(c));
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+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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+ FW_CMD_REQUEST_F |
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+ FW_CMD_WRITE_F |
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+ FW_PTP_CMD_PORTID_V(0));
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+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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+ c.u.ts.sc = FW_PTP_SC_ADJ_FREQ;
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+ c.u.ts.sign = (ppb < 0) ? 1 : 0;
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+ if (ppb < 0)
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+ ppb = -ppb;
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+ c.u.ts.ppb = cpu_to_be32(ppb);
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+
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+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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+ if (err < 0)
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+ dev_err(adapter->pdev_dev,
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+ "PTP: %s error %d\n", __func__, -err);
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+
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+ return err;
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+}
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+
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+/**
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+ * cxgb4_ptp_fineadjtime - Shift the time of the hardware clock
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+ * @ptp: ptp clock structure
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+ * @delta: Desired change in nanoseconds
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+ *
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+ * Adjust the timer by resetting the timecounter structure.
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+ */
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+static int cxgb4_ptp_fineadjtime(struct adapter *adapter, s64 delta)
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+{
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+ struct fw_ptp_cmd c;
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+ int err;
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+
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+ memset(&c, 0, sizeof(c));
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+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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+ FW_CMD_REQUEST_F |
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+ FW_CMD_WRITE_F |
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+ FW_PTP_CMD_PORTID_V(0));
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+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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+ c.u.ts.sc = FW_PTP_SC_ADJ_FTIME;
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+ c.u.ts.tm = cpu_to_be64(delta);
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+
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+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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+ if (err < 0)
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+ dev_err(adapter->pdev_dev,
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+ "PTP: %s error %d\n", __func__, -err);
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+ return err;
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+}
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+
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+/**
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+ * cxgb4_ptp_adjtime - Shift the time of the hardware clock
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+ * @ptp: ptp clock structure
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+ * @delta: Desired change in nanoseconds
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+ *
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+ * Adjust the timer by resetting the timecounter structure.
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+ */
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+static int cxgb4_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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+{
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+ struct adapter *adapter =
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+ (struct adapter *)container_of(ptp, struct adapter,
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+ ptp_clock_info);
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+ struct fw_ptp_cmd c;
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+ s64 sign = 1;
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+ int err;
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+
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+ if (delta < 0)
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+ sign = -1;
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+
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+ if (delta * sign > PTP_CLOCK_MAX_ADJTIME) {
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+ memset(&c, 0, sizeof(c));
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+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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+ FW_CMD_REQUEST_F |
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+ FW_CMD_WRITE_F |
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+ FW_PTP_CMD_PORTID_V(0));
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+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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+ c.u.ts.sc = FW_PTP_SC_ADJ_TIME;
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+ c.u.ts.sign = (delta < 0) ? 1 : 0;
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+ if (delta < 0)
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+ delta = -delta;
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+ c.u.ts.tm = cpu_to_be64(delta);
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+
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+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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+ if (err < 0)
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+ dev_err(adapter->pdev_dev,
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+ "PTP: %s error %d\n", __func__, -err);
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+ } else {
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+ err = cxgb4_ptp_fineadjtime(adapter, delta);
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+ }
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+
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+ return err;
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+}
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+
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+/**
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+ * cxgb4_ptp_gettime - Reads the current time from the hardware clock
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+ * @ptp: ptp clock structure
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+ * @ts: timespec structure to hold the current time value
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+ *
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+ * Read the timecounter and return the correct value in ns after converting
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+ * it into a struct timespec.
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+ */
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+static int cxgb4_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
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+{
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+ struct adapter *adapter = (struct adapter *)container_of(ptp,
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+ struct adapter, ptp_clock_info);
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+ struct fw_ptp_cmd c;
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+ u64 ns;
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+ int err;
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+
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+ memset(&c, 0, sizeof(c));
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+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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+ FW_CMD_REQUEST_F |
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+ FW_CMD_READ_F |
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+ FW_PTP_CMD_PORTID_V(0));
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+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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+ c.u.ts.sc = FW_PTP_SC_GET_TIME;
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+
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+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), &c);
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+ if (err < 0) {
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+ dev_err(adapter->pdev_dev,
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+ "PTP: %s error %d\n", __func__, -err);
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+ return err;
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+ }
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+
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+ /* convert to timespec*/
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+ ns = be64_to_cpu(c.u.ts.tm);
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+ *ts = ns_to_timespec64(ns);
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+
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+ return err;
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+}
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+
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+/**
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+ * cxgb4_ptp_settime - Set the current time on the hardware clock
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+ * @ptp: ptp clock structure
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+ * @ts: timespec containing the new time for the cycle counter
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+ *
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+ * Reset value to new base value instead of the kernel
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+ * wall timer value.
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+ */
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+static int cxgb4_ptp_settime(struct ptp_clock_info *ptp,
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+ const struct timespec64 *ts)
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+{
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+ struct adapter *adapter = (struct adapter *)container_of(ptp,
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+ struct adapter, ptp_clock_info);
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+ struct fw_ptp_cmd c;
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+ u64 ns;
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+ int err;
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+
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+ memset(&c, 0, sizeof(c));
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+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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+ FW_CMD_REQUEST_F |
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+ FW_CMD_WRITE_F |
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+ FW_PTP_CMD_PORTID_V(0));
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+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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+ c.u.ts.sc = FW_PTP_SC_SET_TIME;
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+
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+ ns = timespec64_to_ns(ts);
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+ c.u.ts.tm = cpu_to_be64(ns);
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+
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+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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+ if (err < 0)
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+ dev_err(adapter->pdev_dev,
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+ "PTP: %s error %d\n", __func__, -err);
|
|
|
+
|
|
|
+ return err;
|
|
|
+}
|
|
|
+
|
|
|
+static void cxgb4_init_ptp_timer(struct adapter *adapter)
|
|
|
+{
|
|
|
+ struct fw_ptp_cmd c;
|
|
|
+ int err;
|
|
|
+
|
|
|
+ memset(&c, 0, sizeof(c));
|
|
|
+ c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
|
|
|
+ FW_CMD_REQUEST_F |
|
|
|
+ FW_CMD_WRITE_F |
|
|
|
+ FW_PTP_CMD_PORTID_V(0));
|
|
|
+ c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
|
|
|
+ c.u.scmd.sc = FW_PTP_SC_INIT_TIMER;
|
|
|
+
|
|
|
+ err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
|
|
|
+ if (err < 0)
|
|
|
+ dev_err(adapter->pdev_dev,
|
|
|
+ "PTP: %s error %d\n", __func__, -err);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * cxgb4_ptp_enable - enable or disable an ancillary feature
|
|
|
+ * @ptp: ptp clock structure
|
|
|
+ * @request: Desired resource to enable or disable
|
|
|
+ * @on: Caller passes one to enable or zero to disable
|
|
|
+ *
|
|
|
+ * Enable (or disable) ancillary features of the PHC subsystem.
|
|
|
+ * Currently, no ancillary features are supported.
|
|
|
+ */
|
|
|
+static int cxgb4_ptp_enable(struct ptp_clock_info __always_unused *ptp,
|
|
|
+ struct ptp_clock_request __always_unused *request,
|
|
|
+ int __always_unused on)
|
|
|
+{
|
|
|
+ return -ENOTSUPP;
|
|
|
+}
|
|
|
+
|
|
|
+static const struct ptp_clock_info cxgb4_ptp_clock_info = {
|
|
|
+ .owner = THIS_MODULE,
|
|
|
+ .name = "cxgb4_clock",
|
|
|
+ .max_adj = MAX_PTP_FREQ_ADJ,
|
|
|
+ .n_alarm = 0,
|
|
|
+ .n_ext_ts = 0,
|
|
|
+ .n_per_out = 0,
|
|
|
+ .pps = 0,
|
|
|
+ .adjfreq = cxgb4_ptp_adjfreq,
|
|
|
+ .adjtime = cxgb4_ptp_adjtime,
|
|
|
+ .gettime64 = cxgb4_ptp_gettime,
|
|
|
+ .settime64 = cxgb4_ptp_settime,
|
|
|
+ .enable = cxgb4_ptp_enable,
|
|
|
+};
|
|
|
+
|
|
|
+/**
|
|
|
+ * cxgb4_ptp_init - initialize PTP for devices which support it
|
|
|
+ * @adapter: board private structure
|
|
|
+ *
|
|
|
+ * This function performs the required steps for enabling PTP support.
|
|
|
+ */
|
|
|
+void cxgb4_ptp_init(struct adapter *adapter)
|
|
|
+{
|
|
|
+ struct timespec64 now;
|
|
|
+ /* no need to create a clock device if we already have one */
|
|
|
+ if (!IS_ERR_OR_NULL(adapter->ptp_clock))
|
|
|
+ return;
|
|
|
+
|
|
|
+ adapter->ptp_tx_skb = NULL;
|
|
|
+ adapter->ptp_clock_info = cxgb4_ptp_clock_info;
|
|
|
+ spin_lock_init(&adapter->ptp_lock);
|
|
|
+
|
|
|
+ adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
|
|
|
+ &adapter->pdev->dev);
|
|
|
+ if (!adapter->ptp_clock) {
|
|
|
+ dev_err(adapter->pdev_dev,
|
|
|
+ "PTP %s Clock registration has failed\n", __func__);
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ now = ktime_to_timespec64(ktime_get_real());
|
|
|
+ cxgb4_init_ptp_timer(adapter);
|
|
|
+ if (cxgb4_ptp_settime(&adapter->ptp_clock_info, &now) < 0) {
|
|
|
+ ptp_clock_unregister(adapter->ptp_clock);
|
|
|
+ adapter->ptp_clock = NULL;
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * cxgb4_ptp_remove - disable PTP device and stop the overflow check
|
|
|
+ * @adapter: board private structure
|
|
|
+ *
|
|
|
+ * Stop the PTP support.
|
|
|
+ */
|
|
|
+void cxgb4_ptp_stop(struct adapter *adapter)
|
|
|
+{
|
|
|
+ if (adapter->ptp_tx_skb) {
|
|
|
+ dev_kfree_skb_any(adapter->ptp_tx_skb);
|
|
|
+ adapter->ptp_tx_skb = NULL;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (adapter->ptp_clock) {
|
|
|
+ ptp_clock_unregister(adapter->ptp_clock);
|
|
|
+ adapter->ptp_clock = NULL;
|
|
|
+ }
|
|
|
+}
|
David S. Miller