This allows the perf tool to monitor kernel tracepoint events. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
@@ -19,6 +19,7 @@ config XTENSA
select HAVE_OPROFILE
select HAVE_FUNCTION_TRACER
select HAVE_IRQ_TIME_ACCOUNTING
+ select HAVE_PERF_EVENTS
help
Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both
@@ -0,0 +1,4 @@
+#ifndef __ASM_XTENSA_PERF_EVENT_H
+#define __ASM_XTENSA_PERF_EVENT_H
+
+#endif /* __ASM_XTENSA_PERF_EVENT_H */