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@@ -707,26 +707,25 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
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}
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}
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/**
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/**
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- * pci_update_current_state - Read PCI power state of given device from its
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- * PCI PM registers and cache it
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+ * pci_update_current_state - Read power state of given device and cache it
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* @dev: PCI device to handle.
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* @dev: PCI device to handle.
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* @state: State to cache in case the device doesn't have the PM capability
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* @state: State to cache in case the device doesn't have the PM capability
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+ *
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+ * The power state is read from the PMCSR register, which however is
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+ * inaccessible in D3cold. The platform firmware is therefore queried first
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+ * to detect accessibility of the register. In case the platform firmware
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+ * reports an incorrect state or the device isn't power manageable by the
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+ * platform at all, we try to detect D3cold by testing accessibility of the
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+ * vendor ID in config space.
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*/
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*/
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void pci_update_current_state(struct pci_dev *dev, pci_power_t state)
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void pci_update_current_state(struct pci_dev *dev, pci_power_t state)
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{
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{
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- if (dev->pm_cap) {
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+ if (platform_pci_get_power_state(dev) == PCI_D3cold ||
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+ !pci_device_is_present(dev)) {
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+ dev->current_state = PCI_D3cold;
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+ } else if (dev->pm_cap) {
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u16 pmcsr;
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u16 pmcsr;
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- /*
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- * Configuration space is not accessible for device in
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- * D3cold, so just keep or set D3cold for safety
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- */
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- if (dev->current_state == PCI_D3cold)
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- return;
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- if (state == PCI_D3cold) {
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- dev->current_state = PCI_D3cold;
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- return;
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- }
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pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
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pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
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dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);
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dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);
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} else {
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} else {
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