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@@ -5,32 +5,48 @@ which provides a synchronous audio interface that supports fullduplex
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serial interfaces with frame synchronization such as I2S, AC97, TDM, and
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codec/DSP interfaces.
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-
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Required properties:
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-- compatible: Compatible list, contains "fsl,vf610-sai" or "fsl,imx6sx-sai".
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-- reg: Offset and length of the register set for the device.
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-- clocks: Must contain an entry for each entry in clock-names.
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-- clock-names : Must include the "bus" for register access and "mclk1" "mclk2"
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- "mclk3" for bit clock and frame clock providing.
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-- dmas : Generic dma devicetree binding as described in
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- Documentation/devicetree/bindings/dma/dma.txt.
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-- dma-names : Two dmas have to be defined, "tx" and "rx".
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-- pinctrl-names: Must contain a "default" entry.
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-- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
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- See ../pinctrl/pinctrl-bindings.txt for details of the property values.
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-- big-endian: Boolean property, required if all the FTM_PWM registers
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- are big-endian rather than little-endian.
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-- lsb-first: Configures whether the LSB or the MSB is transmitted first for
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- the fifo data. If this property is absent, the MSB is transmitted first as
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- default, or the LSB is transmitted first.
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-- fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
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- that SAI will work in the synchronous mode (sync Tx with Rx) which means
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- both the transimitter and receiver will send and receive data by following
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- receiver's bit clocks and frame sync clocks.
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-- fsl,sai-asynchronous: This is a boolean property. If present, indicating
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- that SAI will work in the asynchronous mode, which means both transimitter
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- and receiver will send and receive data by following their own bit clocks
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- and frame sync clocks separately.
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+
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+ - compatible : Compatible list, contains "fsl,vf610-sai" or
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+ "fsl,imx6sx-sai".
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+
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+ - reg : Offset and length of the register set for the device.
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+
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+ - clocks : Must contain an entry for each entry in clock-names.
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+
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+ - clock-names : Must include the "bus" for register access and
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+ "mclk1", "mclk2", "mclk3" for bit clock and frame
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+ clock providing.
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+ - dmas : Generic dma devicetree binding as described in
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+ Documentation/devicetree/bindings/dma/dma.txt.
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+
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+ - dma-names : Two dmas have to be defined, "tx" and "rx".
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+
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+ - pinctrl-names : Must contain a "default" entry.
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+
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+ - pinctrl-NNN : One property must exist for each entry in
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+ pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
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+ for details of the property values.
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+
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+ - big-endian : Boolean property, required if all the FTM_PWM
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+ registers are big-endian rather than little-endian.
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+
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+ - lsb-first : Configures whether the LSB or the MSB is transmitted
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+ first for the fifo data. If this property is absent,
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+ the MSB is transmitted first as default, or the LSB
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+ is transmitted first.
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+
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+ - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
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+ that SAI will work in the synchronous mode (sync Tx
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+ with Rx) which means both the transimitter and the
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+ receiver will send and receive data by following
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+ receiver's bit clocks and frame sync clocks.
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+
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+ - fsl,sai-asynchronous: This is a boolean property. If present, indicating
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+ that SAI will work in the asynchronous mode, which
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+ means both transimitter and receiver will send and
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+ receive data by following their own bit clocks and
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+ frame sync clocks separately.
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Note:
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- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
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