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@@ -747,8 +747,9 @@ enum nand_data_interface_type {
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/**
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* struct nand_data_interface - NAND interface timing
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- * @type: type of the timing
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- * @timings: The timing, type according to @type
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+ * @type: type of the timing
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+ * @timings: The timing, type according to @type
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+ * @timings.sdr: Use it when @type is %NAND_SDR_IFACE.
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*/
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struct nand_data_interface {
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enum nand_data_interface_type type;
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@@ -805,8 +806,9 @@ struct nand_op_addr_instr {
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/**
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* struct nand_op_data_instr - Definition of a data instruction
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* @len: number of data bytes to move
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- * @in: buffer to fill when reading from the NAND chip
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- * @out: buffer to read from when writing to the NAND chip
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+ * @buf: buffer to fill
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+ * @buf.in: buffer to fill when reading from the NAND chip
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+ * @buf.out: buffer to read from when writing to the NAND chip
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* @force_8bit: force 8-bit access
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*
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* Please note that "in" and "out" are inverted from the ONFI specification
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@@ -849,9 +851,13 @@ enum nand_op_instr_type {
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/**
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* struct nand_op_instr - Instruction object
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* @type: the instruction type
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- * @cmd/@addr/@data/@waitrdy: extra data associated to the instruction.
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- * You'll have to use the appropriate element
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- * depending on @type
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+ * @ctx: extra data associated to the instruction. You'll have to use the
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+ * appropriate element depending on @type
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+ * @ctx.cmd: use it if @type is %NAND_OP_CMD_INSTR
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+ * @ctx.addr: use it if @type is %NAND_OP_ADDR_INSTR
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+ * @ctx.data: use it if @type is %NAND_OP_DATA_IN_INSTR
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+ * or %NAND_OP_DATA_OUT_INSTR
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+ * @ctx.waitrdy: use it if @type is %NAND_OP_WAITRDY_INSTR
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* @delay_ns: delay the controller should apply after the instruction has been
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* issued on the bus. Most modern controllers have internal timings
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* control logic, and in this case, the controller driver can ignore
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@@ -1004,7 +1010,9 @@ struct nand_op_parser_data_constraints {
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* struct nand_op_parser_pattern_elem - One element of a pattern
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* @type: the instructuction type
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* @optional: whether this element of the pattern is optional or mandatory
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- * @addr/@data: address or data constraint (number of cycles or data length)
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+ * @ctx: address or data constraint
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+ * @ctx.addr: address constraint (number of cycles)
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+ * @ctx.data: data constraint (data length)
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*/
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struct nand_op_parser_pattern_elem {
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enum nand_op_instr_type type;
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@@ -1231,6 +1239,8 @@ int nand_op_parser_exec_op(struct nand_chip *chip,
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* devices.
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* @priv: [OPTIONAL] pointer to private chip data
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* @manufacturer: [INTERN] Contains manufacturer information
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+ * @manufacturer.desc: [INTERN] Contains manufacturer's description
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+ * @manufacturer.priv: [INTERN] Contains manufacturer private information
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*/
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struct nand_chip {
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